MODULE FoxAMD64InstructionSet;
IMPORT KernelLog ;
CONST
maxCPUs* = 30;
maxNumberOperands*=3;
numberMnemonics = 586;
numberInstructions = 1380;
maxMnemonicNameLength =12;
maxCodeLength* =10;
none* = -1;
bitsDefault*=0;
bits8*=1;
bits16*=2;
bits32*=4;
bits64*=8;
bits128*=16;
cpu8086* = 0;
cpu186* = 1;
cpu286* = 2;
cpu386* = 3;
cpu486* = 4;
cpuPentium* = 5;
cpuP6* = 6;
cpuKatmai* = 7;
cpuWillamette* = 8;
cpuPrescott* = 9;
cpuAMD64* = 10;
cpuPrivileged* = 20;
cpuProtected* = 21;
cpuSSE* = 22;
cpuSSE2* = 23;
cpuSSE3* = 24;
cpu3DNow* = 25;
cpuMMX* = 26;
cpuFPU* = 27;
cpuOptions* = {cpuPrivileged .. cpuFPU};
optO16* = 0;
optO32* = 1;
optO64* = 2;
optD64* = 3;
optNot64* = 4;
optA16* = 5;
optA32* = 6;
optPOP* = 7;
optPLOCK* = 8;
optPREP* = 9;
optPREPN* = 10;
reg8*= 0;
reg16*= 1;
reg32*= 2;
reg64*= 3;
CRn*= 4;
DRn*= 5;
segReg*= 6;
mmx*= 7;
xmm*= 8;
sti*= 9;
mem*= 10;
imm*= 11;
ioffset*= 12;
pntr1616*= 13;
pntr1632*= 14;
AL*= 15;
AX*= 16;
CL*= 17;
CR8*= 18;
CS*= 19;
DS*= 20;
DX*= 21;
EAX*= 22;
ECX*= 23;
ES*= 24;
FS*= 25;
GS*= 26;
RAX*= 27;
SS*= 28;
rAX*= 29;
st0*= 30;
imm16*= 31;
imm32*= 32;
imm64*= 33;
imm8*= 34;
uimm16*= 35;
uimm32*= 36;
uimm8*= 37;
simm16*= 38;
simm32*= 39;
simm8*= 40;
mem128*= 41;
mem16*= 42;
mem32*= 43;
mem64*= 44;
mem8*= 45;
moffset16*= 46;
moffset32*= 47;
moffset64*= 48;
moffset8*= 49;
rel16off*= 50;
rel32off*= 51;
rel8off*= 52;
regmem16*= 53;
regmem32*= 54;
regmem64*= 55;
regmem8*= 56;
mmxmem32*= 57;
mmxmem64*= 58;
xmmmem128*= 59;
xmmmem32*= 60;
xmmmem64*= 61;
one*= 62;
three*= 63;
prfOP* = 066H;
prfADR* = 067H;
prfCS* = 02EH;
prfDS* = 03EH;
prfES* = 026H;
prfFS* = 064H;
prfGS* = 065H;
prfSS* = 036H;
prfLOCK* = 0F0H;
prfREP* = 0F3H;
prfREPE* = 0F3H;
prfREPZ* = 0F3H;
prfREPNE* = 0F2H;
prfREPNZ* = 0F2H;
regAL*= 0; regCL*= 1; regDL*= 2; regBL*= 3; regSPL*= 4; regBPL*= 5; regSIL*= 6; regDIL*= 7;
regAH*= 16; regCH*= 17; regDH*= 18; regBH*= 19;
regR8B*= 8; regR9B*= 9; regR10B*= 10; regR11B*= 11; regR12B*= 12; regR13B*= 13; regR14B*= 14; regR15B*= 15;
regAX*= 32; regCX*= 33; regDX*= 34; regBX*= 35; regSP*= 36; regBP*= 37; regSI*= 38; regDI*= 39;
regR8W*= 40; regR9W*= 41; regR10W*= 42; regR11W*= 43; regR12W*= 44; regR13W*= 45; regR14W*= 46; regR15W*= 47;
regEAX*= 64; regECX*= 65; regEDX*= 66; regEBX*= 67; regESP*= 68; regEBP*= 69; regESI*= 70; regEDI*= 71;
regR8D*= 72; regR9D*= 73; regR10D*= 74; regR11D*= 75; regR12D*= 76; regR13D*= 77; regR14D*= 78; regR15D*= 79;
regRAX*= 96; regRCX*= 97; regRDX*= 98; regRBX*= 99; regRSP*= 100; regRBP*= 101; regRSI*= 102; regRDI*= 103;
regR8*= 104; regR9*= 105; regR10*= 106; regR11*= 107; regR12*= 108; regR13*= 109; regR14*= 110; regR15*= 111;
regRIP*= 112;
regES*= 128; regCS*= 129; regSS*= 130; regDS*= 131; regFS*= 132; regGS*= 133; regCR0*= 134; regCR1*= 135;
regCR2*= 136; regCR3*= 137; regCR4*= 138; regCR5*= 139; regCR6*= 140; regCR7*= 141; regCR8*= 142; regCR9*= 143;
regCR10*= 144; regCR11*= 145; regCR12*= 146; regCR13*= 147; regCR14*= 148; regCR15*= 149; regDR0*= 150; regDR1*= 151;
regDR2*= 152; regDR3*= 153; regDR4*= 154; regDR5*= 155; regDR6*= 156; regDR7*= 157; regDR8*= 158; regDR9*= 159;
regDR10*= 160; regDR11*= 161; regDR12*= 162; regDR13*= 163; regDR14*= 164; regDR15*= 165; regST0*= 166; regST1*= 167;
regST2*= 168; regST3*= 169; regST4*= 170; regST5*= 171; regST6*= 172; regST7*= 173; regXMM0*= 174; regXMM1*= 175;
regXMM2*= 176; regXMM3*= 177; regXMM4*= 178; regXMM5*= 179; regXMM6*= 180; regXMM7*= 181; regXMM8*= 182; regXMM9*= 183;
regXMM10*= 184; regXMM11*= 185; regXMM12*= 186; regXMM13*= 187; regXMM14*= 188; regXMM15*= 189; regMMX0*= 190; regMMX1*= 191;
regMMX2*= 192; regMMX3*= 193; regMMX4*= 194; regMMX5*= 195; regMMX6*= 196; regMMX7*= 197; numberRegisters*= 198;
opAAA* = 0;
opAAD* = 1;
opAAM* = 2;
opAAS* = 3;
opADC* = 4;
opADD* = 5;
opADDPD* = 6;
opADDPS* = 7;
opADDSD* = 8;
opADDSS* = 9;
opADDSUBPD* = 10;
opADDSUBPS* = 11;
opAND* = 12;
opANDNPD* = 13;
opANDNPS* = 14;
opANDPD* = 15;
opANDPS* = 16;
opARPL* = 17;
opBOUND* = 18;
opBSF* = 19;
opBSR* = 20;
opBSWAP* = 21;
opBT* = 22;
opBTC* = 23;
opBTR* = 24;
opBTS* = 25;
opCALL* = 26;
opCALLFAR* = 27;
opCBW* = 28;
opCDQ* = 29;
opCDQE* = 30;
opCFLUSH* = 31;
opCLC* = 32;
opCLD* = 33;
opCLGI* = 34;
opCLI* = 35;
opCLTS* = 36;
opCMC* = 37;
opCMOVA* = 38;
opCMOVAE* = 39;
opCMOVB* = 40;
opCMOVBE* = 41;
opCMOVC* = 42;
opCMOVE* = 43;
opCMOVG* = 44;
opCMOVGE* = 45;
opCMOVL* = 46;
opCMOVLE* = 47;
opCMOVNA* = 48;
opCMOVNAE* = 49;
opCMOVNB* = 50;
opCMOVNBE* = 51;
opCMOVNC* = 52;
opCMOVNE* = 53;
opCMOVNG* = 54;
opCMOVNGE* = 55;
opCMOVNL* = 56;
opCMOVNLE* = 57;
opCMOVNO* = 58;
opCMOVNP* = 59;
opCMOVNS* = 60;
opCMOVNZ* = 61;
opCMOVO* = 62;
opCMOVP* = 63;
opCMOVPE* = 64;
opCMOVPO* = 65;
opCMOVS* = 66;
opCMOVZ* = 67;
opCMP* = 68;
opCMPPD* = 69;
opCMPPS* = 70;
opCMPS* = 71;
opCMPSB* = 72;
opCMPSD* = 73;
opCMPSQ* = 74;
opCMPSS* = 75;
opCMPSW* = 76;
opCMPXCHG* = 77;
opCMPXCHG16B* = 78;
opCMPXCHG8B* = 79;
opCOMISD* = 80;
opCOMISS* = 81;
opCPUID* = 82;
opCQO* = 83;
opCVTDQ2PD* = 84;
opCVTDQ2PS* = 85;
opCVTPD2DQ* = 86;
opCVTPD2PI* = 87;
opCVTPD2PS* = 88;
opCVTPI2PD* = 89;
opCVTPI2PS* = 90;
opCVTPS2DQ* = 91;
opCVTPS2PD* = 92;
opCVTPS2PI* = 93;
opCVTSD2SI* = 94;
opCVTSD2SS* = 95;
opCVTSI2SD* = 96;
opCVTSI2SS* = 97;
opCVTSS2SD* = 98;
opCVTSS2SI* = 99;
opCVTTPD2DQ* = 100;
opCVTTPD2PI* = 101;
opCVTTPS2DQ* = 102;
opCVTTPS2PI* = 103;
opCVTTSD2SI* = 104;
opCVTTSS2SI* = 105;
opCWD* = 106;
opCWDE* = 107;
opDAA* = 108;
opDAS* = 109;
opDEC* = 110;
opDIV* = 111;
opDIVPD* = 112;
opDIVPS* = 113;
opDIVSD* = 114;
opDIVSS* = 115;
opEMMS* = 116;
opENTER* = 117;
opF2XM1* = 118;
opFABS* = 119;
opFADD* = 120;
opFADDP* = 121;
opFBLD* = 122;
opFBSTP* = 123;
opFCHS* = 124;
opFCLEX* = 125;
opFCMOVB* = 126;
opFCMOVBE* = 127;
opFCMOVE* = 128;
opFCMOVNB* = 129;
opFCMOVNBE* = 130;
opFCMOVNE* = 131;
opFCMOVNU* = 132;
opFCMOVU* = 133;
opFCOM* = 134;
opFCOMI* = 135;
opFCOMIP* = 136;
opFCOMP* = 137;
opFCOMPP* = 138;
opFCOS* = 139;
opFDECSTP* = 140;
opFDIV* = 141;
opFDIVP* = 142;
opFDIVR* = 143;
opFDIVRP* = 144;
opFEMMS* = 145;
opFFREE* = 146;
opFIADD* = 147;
opFICOM* = 148;
opFICOMP* = 149;
opFIDIV* = 150;
opFIDIVR* = 151;
opFILD* = 152;
opFIMUL* = 153;
opFINCSTP* = 154;
opFINIT* = 155;
opFIST* = 156;
opFISTP* = 157;
opFISTTP* = 158;
opFISUB* = 159;
opFISUBR* = 160;
opFLD* = 161;
opFLD1* = 162;
opFLDCW* = 163;
opFLDENV* = 164;
opFLDL2E* = 165;
opFLDL2T* = 166;
opFLDLG2* = 167;
opFLDLN2* = 168;
opFLDPI* = 169;
opFLDZ* = 170;
opFMUL* = 171;
opFMULP* = 172;
opFNCLEX* = 173;
opFNINIT* = 174;
opFNOP* = 175;
opFNSAVE* = 176;
opFNSTCW* = 177;
opFNSTENV* = 178;
opFNSTSW* = 179;
opFPATAN* = 180;
opFPREM* = 181;
opFPREM1* = 182;
opFPTAN* = 183;
opFRNDINT* = 184;
opFRSTOR* = 185;
opFSAVE* = 186;
opFSCALE* = 187;
opFSIN* = 188;
opFSINCOS* = 189;
opFSQRT* = 190;
opFST* = 191;
opFSTCW* = 192;
opFSTENV* = 193;
opFSTP* = 194;
opFSTSW* = 195;
opFSUB* = 196;
opFSUBP* = 197;
opFSUBR* = 198;
opFSUBRP* = 199;
opFTST* = 200;
opFUCOM* = 201;
opFUCOMI* = 202;
opFUCOMIP* = 203;
opFUCOMP* = 204;
opFUCOMPP* = 205;
opFWAIT* = 206;
opFXAM* = 207;
opFXCH* = 208;
opFXRSTOR* = 209;
opFXSAVE* = 210;
opFXTRACT* = 211;
opFYL2X* = 212;
opFYL2XP1* = 213;
opHADDPD* = 214;
opHADDPS* = 215;
opHLT* = 216;
opHSUBPD* = 217;
opHSUBPS* = 218;
opIDIV* = 219;
opIMUL* = 220;
opIN* = 221;
opINC* = 222;
opINS* = 223;
opINSB* = 224;
opINSD* = 225;
opINSW* = 226;
opINT* = 227;
opINT3* = 228;
opINTO* = 229;
opINVD* = 230;
opINVLPG* = 231;
opINVLPGA* = 232;
opIRET* = 233;
opIRETD* = 234;
opIRETQ* = 235;
opJA* = 236;
opJAE* = 237;
opJB* = 238;
opJBE* = 239;
opJC* = 240;
opJCXZ* = 241;
opJE* = 242;
opJECXZ* = 243;
opJG* = 244;
opJGE* = 245;
opJL* = 246;
opJLE* = 247;
opJMP* = 248;
opJMPFAR* = 249;
opJNA* = 250;
opJNAE* = 251;
opJNB* = 252;
opJNBE* = 253;
opJNC* = 254;
opJNE* = 255;
opJNG* = 256;
opJNGE* = 257;
opJNL* = 258;
opJNLE* = 259;
opJNO* = 260;
opJNP* = 261;
opJNS* = 262;
opJNZ* = 263;
opJO* = 264;
opJP* = 265;
opJPE* = 266;
opJPO* = 267;
opJRCXZ* = 268;
opJS* = 269;
opJZ* = 270;
opLAHF* = 271;
opLAR* = 272;
opLDDQU* = 273;
opLDMXCSR* = 274;
opLDS* = 275;
opLEA* = 276;
opLEAVE* = 277;
opLES* = 278;
opLFENCE* = 279;
opLFS* = 280;
opLGDT* = 281;
opLGS* = 282;
opLIDT* = 283;
opLLDT* = 284;
opLMSW* = 285;
opLODS* = 286;
opLODSB* = 287;
opLODSD* = 288;
opLODSQ* = 289;
opLODSW* = 290;
opLOOP* = 291;
opLOOPE* = 292;
opLOOPNE* = 293;
opLOOPNZ* = 294;
opLOOPZ* = 295;
opLSL* = 296;
opLSS* = 297;
opLTR* = 298;
opMASKMOVDQU* = 299;
opMASKMOVQ* = 300;
opMAXPD* = 301;
opMAXPS* = 302;
opMAXSD* = 303;
opMAXSS* = 304;
opMFENCE* = 305;
opMINPD* = 306;
opMINPS* = 307;
opMINSD* = 308;
opMINSS* = 309;
opMOV* = 310;
opMOVAPD* = 311;
opMOVAPS* = 312;
opMOVD* = 313;
opMOVDDUP* = 314;
opMOVDQ2Q* = 315;
opMOVDQA* = 316;
opMOVDQU* = 317;
opMOVHLPS* = 318;
opMOVHPD* = 319;
opMOVHPS* = 320;
opMOVLHPS* = 321;
opMOVLPD* = 322;
opMOVLPS* = 323;
opMOVMSKPD* = 324;
opMOVMSKPS* = 325;
opMOVNTDQ* = 326;
opMOVNTI* = 327;
opMOVNTPD* = 328;
opMOVNTPS* = 329;
opMOVNTQ* = 330;
opMOVQ* = 331;
opMOVQ2DQ* = 332;
opMOVS* = 333;
opMOVSB* = 334;
opMOVSD* = 335;
opMOVSHDUP* = 336;
opMOVSLDUP* = 337;
opMOVSQ* = 338;
opMOVSS* = 339;
opMOVSW* = 340;
opMOVSX* = 341;
opMOVSXD* = 342;
opMOVUPD* = 343;
opMOVUPS* = 344;
opMOVZX* = 345;
opMUL* = 346;
opMULPD* = 347;
opMULPS* = 348;
opMULSD* = 349;
opMULSS* = 350;
opNEG* = 351;
opNOP* = 352;
opNOT* = 353;
opOR* = 354;
opORPD* = 355;
opORPS* = 356;
opOUT* = 357;
opOUTS* = 358;
opOUTSB* = 359;
opOUTSD* = 360;
opOUTSW* = 361;
opPACKSSDW* = 362;
opPACKSSWB* = 363;
opPACKUSWB* = 364;
opPADDB* = 365;
opPADDD* = 366;
opPADDQ* = 367;
opPADDSB* = 368;
opPADDSW* = 369;
opPADDUSB* = 370;
opPADDUSW* = 371;
opPADDW* = 372;
opPAND* = 373;
opPANDN* = 374;
opPAUSE* = 375;
opPAVGB* = 376;
opPAVGUSB* = 377;
opPAVGW* = 378;
opPCMPEQB* = 379;
opPCMPEQD* = 380;
opPCMPEQW* = 381;
opPCMPGTB* = 382;
opPCMPGTD* = 383;
opPCMPGTW* = 384;
opPEXTRW* = 385;
opPF2ID* = 386;
opPF2IW* = 387;
opPFACC* = 388;
opPFADD* = 389;
opPFCMPEQ* = 390;
opPFCMPGE* = 391;
opPFCMPGT* = 392;
opPFMAX* = 393;
opPFMIN* = 394;
opPFMUL* = 395;
opPFNACC* = 396;
opPFPNACC* = 397;
opPFRCP* = 398;
opPFRCPIT1* = 399;
opPFRCPIT2* = 400;
opPFRSQIT1* = 401;
opPFRSQRT* = 402;
opPFSUB* = 403;
opPFSUBR* = 404;
opPI2FD* = 405;
opPI2FW* = 406;
opPINSRW* = 407;
opPMADDWD* = 408;
opPMAXSW* = 409;
opPMAXUB* = 410;
opPMINSW* = 411;
opPMINUB* = 412;
opPMOVMSKB* = 413;
opPMULHRW* = 414;
opPMULHUW* = 415;
opPMULHW* = 416;
opPMULLW* = 417;
opPMULUDQ* = 418;
opPOP* = 419;
opPOPA* = 420;
opPOPAD* = 421;
opPOPAW* = 422;
opPOPF* = 423;
opPOPFD* = 424;
opPOPFQ* = 425;
opPOR* = 426;
opPREFETCH* = 427;
opPREFETCHNTA* = 428;
opPREFETCHT0* = 429;
opPREFETCHT1* = 430;
opPREFETCHT2* = 431;
opPREFETCHW* = 432;
opPSADBW* = 433;
opPSHUFD* = 434;
opPSHUFHW* = 435;
opPSHUFLW* = 436;
opPSHUFW* = 437;
opPSLLD* = 438;
opPSLLDQ* = 439;
opPSLLQ* = 440;
opPSLLW* = 441;
opPSRAD* = 442;
opPSRAW* = 443;
opPSRLD* = 444;
opPSRLDQ* = 445;
opPSRLQ* = 446;
opPSRLW* = 447;
opPSUBB* = 448;
opPSUBD* = 449;
opPSUBQ* = 450;
opPSUBSB* = 451;
opPSUBSW* = 452;
opPSUBUSB* = 453;
opPSUBUSW* = 454;
opPSUBW* = 455;
opPSWAPD* = 456;
opPUNPCKHBW* = 457;
opPUNPCKHDQ* = 458;
opPUNPCKHQDQ* = 459;
opPUNPCKHWD* = 460;
opPUNPCKLBW* = 461;
opPUNPCKLDQ* = 462;
opPUNPCKLQDQ* = 463;
opPUNPCKLWD* = 464;
opPUSH* = 465;
opPUSHA* = 466;
opPUSHAD* = 467;
opPUSHF* = 468;
opPUSHFD* = 469;
opPUSHFQ* = 470;
opPXOR* = 471;
opRCL* = 472;
opRCPPS* = 473;
opRCPSS* = 474;
opRCR* = 475;
opRDMSR* = 476;
opRDPMC* = 477;
opRDTSC* = 478;
opRDTSCP* = 479;
opRET* = 480;
opRETF* = 481;
opROL* = 482;
opROR* = 483;
opRSM* = 484;
opRSQRTPS* = 485;
opRSQRTSS* = 486;
opSAHF* = 487;
opSAL* = 488;
opSAR* = 489;
opSBB* = 490;
opSCAS* = 491;
opSCASB* = 492;
opSCASD* = 493;
opSCASQ* = 494;
opSCASW* = 495;
opSETA* = 496;
opSETAE* = 497;
opSETB* = 498;
opSETBE* = 499;
opSETC* = 500;
opSETE* = 501;
opSETG* = 502;
opSETGE* = 503;
opSETL* = 504;
opSETLE* = 505;
opSETNA* = 506;
opSETNAE* = 507;
opSETNB* = 508;
opSETNBE* = 509;
opSETNC* = 510;
opSETNE* = 511;
opSETNG* = 512;
opSETNGE* = 513;
opSETNL* = 514;
opSETNLE* = 515;
opSETNO* = 516;
opSETNP* = 517;
opSETNS* = 518;
opSETNZ* = 519;
opSETO* = 520;
opSETP* = 521;
opSETPE* = 522;
opSETPO* = 523;
opSETS* = 524;
opSETZ* = 525;
opSFENCE* = 526;
opSGDT* = 527;
opSHL* = 528;
opSHLD* = 529;
opSHR* = 530;
opSHRD* = 531;
opSHUFPD* = 532;
opSHUFPS* = 533;
opSIDT* = 534;
opSKINIT* = 535;
opSLDT* = 536;
opSMSW* = 537;
opSQRTPD* = 538;
opSQRTPS* = 539;
opSQRTSD* = 540;
opSQRTSS* = 541;
opSTC* = 542;
opSTD* = 543;
opSTGI* = 544;
opSTI* = 545;
opSTMXCSR* = 546;
opSTOS* = 547;
opSTOSB* = 548;
opSTOSD* = 549;
opSTOSQ* = 550;
opSTOSW* = 551;
opSTR* = 552;
opSUB* = 553;
opSUBPD* = 554;
opSUBPS* = 555;
opSUBSD* = 556;
opSUBSS* = 557;
opSWAPGS* = 558;
opSYSCALL* = 559;
opSYSENTER* = 560;
opSYSEXIT* = 561;
opSYSRET* = 562;
opTEST* = 563;
opUCOMISD* = 564;
opUCOMISS* = 565;
opUD2* = 566;
opUNPCKHPD* = 567;
opUNPCKHPS* = 568;
opUNPCKLPD* = 569;
opUNPCKLPS* = 570;
opVERR* = 571;
opVERW* = 572;
opVMLOAD* = 573;
opVMMCALL* = 574;
opVMRUN* = 575;
opVMSAVE* = 576;
opWBINVD* = 577;
opWRMSR* = 578;
opXADD* = 579;
opXCHG* = 580;
opXLAT* = 581;
opXLATB* = 582;
opXOR* = 583;
opXORPD* = 584;
opXORPS* = 585;
opCode*= 0; modRMExtension*= 1; modRMBoth*= 2; cb*= 3; cw*= 4; cd*= 5; cp*= 6; ib*= 7;
iw*= 8; id*= 9; iq*= 10; rb*= 11; rw*= 12; rd*= 13; rq*= 14; mem64Operand*= 15;
mem128Operand*= 16; fpStackOperand*= 17; directMemoryOffset*= 18;
TYPE
Name = ARRAY 20 OF CHAR;
OperandType* = SHORTINT;
CPUOptions*= SET;
Code*=CHAR;
Instruction* = RECORD
code-: ARRAY maxCodeLength OF Code;
operands-: ARRAY maxNumberOperands OF OperandType;
bitwidthOptions-: SET;
cpuOptions-: SET;
END;
Mnemonic* = RECORD
name-: ARRAY maxMnemonicNameLength OF CHAR;
firstInstruction-, lastInstruction-: LONGINT;
END;
CPUType* = RECORD
name-: Name;
cpuOptions-: SET;
END;
Register* = RECORD
name-: Name;
type-: OperandType;
index-: SHORTINT;
sizeInBytes-: SHORTINT;
END;
VAR
mnemonics-: ARRAY numberMnemonics OF Mnemonic;
instructions-: ARRAY numberInstructions OF Instruction;
registers-: ARRAY numberRegisters OF Register;
registersByClass-: ARRAY sti+1 OF ARRAY 17 OF LONGINT;
cpus-: ARRAY maxCPUs OF CPUType;
cpuCount: LONGINT;
PROCEDURE FindMnemonic* (CONST mnem: ARRAY OF CHAR): LONGINT;
VAR l, r, m: LONGINT;
BEGIN
l := 0;
r := numberMnemonics;
WHILE l # r DO
m := (l + r) DIV 2;
IF mnem < mnemonics[m].name THEN r := m;
ELSIF mnem > mnemonics[m].name THEN l := m + 1;
ELSE RETURN m;
END
END;
RETURN none;
END FindMnemonic;
PROCEDURE FindRegister* (CONST reg: ARRAY OF CHAR): LONGINT;
VAR i: LONGINT;
BEGIN
FOR i := 0 TO numberRegisters - 1 DO
IF registers[i].name = reg THEN RETURN i END;
END;
RETURN none;
END FindRegister;
PROCEDURE RegisterType*(regNumber: LONGINT): OperandType;
BEGIN IF regNumber = none THEN RETURN none ELSE RETURN registers[regNumber].type END
END RegisterType;
PROCEDURE RegisterIndex*(regNumber: LONGINT): SHORTINT;
BEGIN IF regNumber = none THEN RETURN none ELSE RETURN registers[regNumber].index END
END RegisterIndex;
PROCEDURE FindCPU* (CONST cpu: ARRAY OF CHAR): LONGINT;
VAR i: LONGINT;
BEGIN
FOR i := 0 TO cpuCount - 1 DO
IF cpus[i].name = cpu THEN RETURN i END;
END;
RETURN none;
END FindCPU;
PROCEDURE InitInstructions;
PROCEDURE StartMnemonic(number: LONGINT; CONST name: ARRAY OF CHAR; firstInstruction: LONGINT);
BEGIN
COPY (name, mnemonics[number].name);
mnemonics[number].firstInstruction := firstInstruction;
END StartMnemonic;
PROCEDURE EndMnemonic(number: LONGINT; lastInstruction: LONGINT);
BEGIN
mnemonics[number].lastInstruction := lastInstruction;
END EndMnemonic;
PROCEDURE HexOrd (ch: CHAR): INTEGER;
BEGIN
IF ch <= "9" THEN RETURN ORD (ch) - ORD ("0")
ELSE RETURN ORD (CAP (ch)) - ORD ("A") + 10
END
END HexOrd;
PROCEDURE Encode(CONST charcode: ARRAY OF CHAR; VAR code: ARRAY OF Code);
VAR i,k,length: SHORTINT; ch1,ch2: CHAR;
BEGIN
i := 0; k := 0;
WHILE(charcode[2*i] # 0X) DO
ch1 := charcode[2*i];
ch2 := charcode[2*i+1];
CASE ch1 OF
'0'..'9','A'..'F':
CASE ch2 OF '0'..'9','A'..'F':
code[k] := CHR(opCode);INC(k);
code[k] := CHR(HexOrd(ch1)*10H+HexOrd(ch2)); INC(k);
ELSE HALT(100)
END;
|'/':
CASE ch2 OF
'r': code[k] := CHR(modRMBoth); INC(k);
|'0'..'7': code[k] := CHR(modRMExtension); INC(k); code[k] := CHR(HexOrd(ch2)); INC(k);
ELSE HALT(100)
END;
|'c':
CASE ch2 OF
'b': code[k] := CHR(cb); INC(k);
|'w': code[k] := CHR(cw); INC(k);
|'d': code[k] := CHR(cd); INC(k);
|'p': code[k] := CHR(cp); INC(k);
ELSE HALT(100)
END;
|'i':
CASE ch2 OF
'b': code[k] := CHR(ib); INC(k);
|'w': code[k] := CHR(iw); INC(k);
|'d': code[k] := CHR(id); INC(k);
|'q': code[k] := CHR(iq); INC(k);
ELSE HALT(100)
END;
|'m':
CASE ch2 OF
'6': code[k] := CHR(mem64Operand); INC(k);
|'1': code[k] := CHR(mem128Operand); INC(k);
ELSE HALT(100)
END;
|'+':
CASE ch2 OF
'i': code[k] := CHR(fpStackOperand); INC(k);
|'o': code[k] := CHR(directMemoryOffset); INC(k);
ELSE HALT(100)
END;
|'r':
CASE ch2 OF
'b': code[k] := CHR(rb); INC(k);
|'w': code[k] := CHR(rw); INC(k);
|'d': code[k] := CHR(rd); INC(k);
|'q': code[k] := CHR(rq); INC(k);
ELSE HALT(100)
END;
ELSE HALT(100)
END;
INC(i);
END;
length := k;
WHILE(k < LEN(code)) DO
code[k] := CHR(none);
INC(k);
END;
END Encode;
PROCEDURE AddInstruction(number: LONGINT; op1,op2,op3: OperandType; CONST code: ARRAY OF CHAR; bitwidthOptions: SET; cpuOptions: SET);
VAR i: SHORTINT;
BEGIN
instructions[number].operands[0] := op1;
instructions[number].operands[1] := op2;
instructions[number].operands[2] := op3;
i := 0;
WHILE (i<maxNumberOperands) & (instructions[number].operands[i] # none) DO INC(i); END;
Encode(code,instructions[number].code);
instructions[number].bitwidthOptions := bitwidthOptions;
instructions[number].cpuOptions := cpuOptions;
END AddInstruction;
BEGIN
StartMnemonic(opAAA, "AAA", 0);
AddInstruction(0, none, none, none, "37", {optNot64}, {cpu8086});
EndMnemonic(opAAA, 0);
StartMnemonic(opAAD, "AAD", 1);
AddInstruction(1, none, none, none, "D50A", {optNot64}, {cpu8086});
AddInstruction(2, none, none, none, "D5ib", {optNot64}, {cpu8086});
EndMnemonic(opAAD, 2);
StartMnemonic(opAAM, "AAM", 3);
AddInstruction(3, none, none, none, "D40A", {optNot64}, {cpu8086});
AddInstruction(4, none, none, none, "D4ib", {optNot64}, {cpu8086});
EndMnemonic(opAAM, 4);
StartMnemonic(opAAS, "AAS", 5);
AddInstruction(5, none, none, none, "3F", {optNot64}, {cpu8086});
EndMnemonic(opAAS, 5);
StartMnemonic(opADC, "ADC", 6);
AddInstruction(6, regmem8, reg8, none, "10/r", {}, {cpu8086});
AddInstruction(7, regmem16, reg16, none, "11/r", {optO16}, {cpu8086});
AddInstruction(8, regmem32, reg32, none, "11/r", {optO32}, {cpu386});
AddInstruction(9, regmem64, reg64, none, "11/r", {}, {cpuAMD64});
AddInstruction(10, reg8, regmem8, none, "12/r", {}, {cpu8086});
AddInstruction(11, reg16, regmem16, none, "13/r", {optO16}, {cpu8086});
AddInstruction(12, reg32, regmem32, none, "13/r", {optO32}, {cpu386});
AddInstruction(13, reg64, regmem64, none, "13/r", {}, {cpuAMD64});
AddInstruction(14, AL, imm8, none, "14ib", {}, {cpu8086});
AddInstruction(15, AX, imm16, none, "15iw", {optO16}, {cpu8086});
AddInstruction(16, EAX, imm32, none, "15id", {optO32}, {cpu386});
AddInstruction(17, RAX, imm32, none, "15id", {}, {cpuAMD64});
AddInstruction(18, regmem8, imm8, none, "80/2ib", {}, {cpu8086});
AddInstruction(19, regmem16, imm16, none, "81/2iw", {optO16}, {cpu8086});
AddInstruction(20, regmem32, imm32, none, "81/2id", {optO32}, {cpu386});
AddInstruction(21, regmem64, imm32, none, "81/2id", {}, {cpuAMD64});
AddInstruction(22, regmem16, simm8, none, "83/2ib", {optO16}, {cpu8086});
AddInstruction(23, regmem32, simm8, none, "83/2ib", {optO32}, {cpu386});
AddInstruction(24, regmem64, simm8, none, "83/2ib", {}, {cpuAMD64});
EndMnemonic(opADC, 24);
StartMnemonic(opADD, "ADD", 25);
AddInstruction(25, regmem8, reg8, none, "00/r", {}, {cpu8086});
AddInstruction(26, regmem16, reg16, none, "01/r", {optO16}, {cpu8086});
AddInstruction(27, regmem32, reg32, none, "01/r", {optO32}, {cpu386});
AddInstruction(28, regmem64, reg64, none, "01/r", {}, {cpuAMD64});
AddInstruction(29, reg8, regmem8, none, "02/r", {}, {cpu8086});
AddInstruction(30, reg16, regmem16, none, "03/r", {optO16}, {cpu8086});
AddInstruction(31, reg32, regmem32, none, "03/r", {optO32}, {cpu386});
AddInstruction(32, reg64, regmem64, none, "03/r", {}, {cpuAMD64});
AddInstruction(33, AL, imm8, none, "04ib", {}, {cpu8086});
AddInstruction(34, AX, imm16, none, "05iw", {optO16}, {cpu8086});
AddInstruction(35, EAX, imm32, none, "05id", {optO32}, {cpu386});
AddInstruction(36, RAX, imm32, none, "05id", {}, {cpuAMD64});
AddInstruction(37, regmem8, imm8, none, "80/0ib", {}, {cpu8086});
AddInstruction(38, regmem16, imm16, none, "81/0iw", {optO16}, {cpu8086});
AddInstruction(39, regmem32, imm32, none, "81/0id", {optO32}, {cpu386});
AddInstruction(40, regmem64, imm32, none, "81/0id", {}, {cpuAMD64});
AddInstruction(41, regmem16, simm8, none, "83/0ib", {optO16}, {cpu8086});
AddInstruction(42, regmem32, simm8, none, "83/0ib", {optO32}, {cpu386});
AddInstruction(43, regmem64, simm8, none, "83/0ib", {}, {cpuAMD64});
EndMnemonic(opADD, 43);
StartMnemonic(opADDPD, "ADDPD", 44);
AddInstruction(44, xmm, xmmmem128, none, "660F58/r", {}, {cpuSSE2});
EndMnemonic(opADDPD, 44);
StartMnemonic(opADDPS, "ADDPS", 45);
AddInstruction(45, xmm, xmmmem128, none, "0F58/r", {}, {cpuSSE});
EndMnemonic(opADDPS, 45);
StartMnemonic(opADDSD, "ADDSD", 46);
AddInstruction(46, xmm, xmmmem64, none, "F20F58/r", {}, {cpuSSE2});
EndMnemonic(opADDSD, 46);
StartMnemonic(opADDSS, "ADDSS", 47);
AddInstruction(47, xmm, xmmmem32, none, "F30F58/r", {}, {cpuSSE});
EndMnemonic(opADDSS, 47);
StartMnemonic(opADDSUBPD, "ADDSUBPD", 48);
AddInstruction(48, xmm, xmmmem128, none, "660FD0/r", {}, {cpuSSE3});
EndMnemonic(opADDSUBPD, 48);
StartMnemonic(opADDSUBPS, "ADDSUBPS", 49);
AddInstruction(49, xmm, xmmmem128, none, "F20FD0/r", {}, {cpuSSE3});
EndMnemonic(opADDSUBPS, 49);
StartMnemonic(opAND, "AND", 50);
AddInstruction(50, regmem8, reg8, none, "20/r", {}, {cpu8086});
AddInstruction(51, regmem16, reg16, none, "21/r", {optO16}, {cpu8086});
AddInstruction(52, regmem32, reg32, none, "21/r", {optO32}, {cpu386});
AddInstruction(53, regmem64, reg64, none, "21/r", {}, {cpuAMD64});
AddInstruction(54, reg8, regmem8, none, "22/r", {}, {cpu8086});
AddInstruction(55, reg16, regmem16, none, "23/r", {optO16}, {cpu8086});
AddInstruction(56, reg32, regmem32, none, "23/r", {optO32}, {cpu386});
AddInstruction(57, reg64, regmem64, none, "23/r", {}, {cpuAMD64});
AddInstruction(58, AL, imm8, none, "24ib", {}, {cpu8086});
AddInstruction(59, AX, imm16, none, "25iw", {optO16}, {cpu8086});
AddInstruction(60, EAX, imm32, none, "25id", {optO32}, {cpu386});
AddInstruction(61, RAX, imm32, none, "25id", {}, {cpuAMD64});
AddInstruction(62, regmem8, imm8, none, "80/4ib", {}, {cpu8086});
AddInstruction(63, regmem16, imm16, none, "81/4iw", {optO16}, {cpu8086});
AddInstruction(64, regmem32, imm32, none, "81/4id", {optO32}, {cpu386});
AddInstruction(65, regmem64, imm32, none, "81/4id", {}, {cpuAMD64});
AddInstruction(66, regmem16, simm8, none, "83/4ib", {optO16}, {cpu8086});
AddInstruction(67, regmem32, simm8, none, "83/4ib", {optO32}, {cpu386});
AddInstruction(68, regmem64, simm8, none, "83/4ib", {}, {cpuAMD64});
EndMnemonic(opAND, 68);
StartMnemonic(opANDNPD, "ANDNPD", 69);
AddInstruction(69, xmm, xmmmem128, none, "660F55/r", {}, {cpuSSE2});
EndMnemonic(opANDNPD, 69);
StartMnemonic(opANDNPS, "ANDNPS", 70);
AddInstruction(70, xmm, xmmmem128, none, "0F55/r", {}, {cpuSSE});
EndMnemonic(opANDNPS, 70);
StartMnemonic(opANDPD, "ANDPD", 71);
AddInstruction(71, xmm, xmmmem128, none, "660F54/r", {}, {cpuSSE2});
EndMnemonic(opANDPD, 71);
StartMnemonic(opANDPS, "ANDPS", 72);
AddInstruction(72, xmm, xmmmem128, none, "0F54/r", {}, {cpuSSE});
EndMnemonic(opANDPS, 72);
StartMnemonic(opARPL, "ARPL", 73);
AddInstruction(73, regmem16, reg16, none, "63/r", {}, {cpu286,cpuPrivileged});
EndMnemonic(opARPL, 73);
StartMnemonic(opBOUND, "BOUND", 74);
AddInstruction(74, reg16, mem, none, "62/r", {optO16,optNot64}, {cpu186});
AddInstruction(75, reg32, mem, none, "62/r", {optO32,optNot64}, {cpu386});
EndMnemonic(opBOUND, 75);
StartMnemonic(opBSF, "BSF", 76);
AddInstruction(76, reg16, regmem16, none, "0FBC/r", {optO16}, {cpu386});
AddInstruction(77, reg32, regmem32, none, "0FBC/r", {optO32}, {cpu386});
AddInstruction(78, reg64, regmem64, none, "0FBC/r", {}, {cpuAMD64});
EndMnemonic(opBSF, 78);
StartMnemonic(opBSR, "BSR", 79);
AddInstruction(79, reg16, regmem16, none, "0FBD/r", {optO16}, {cpu386});
AddInstruction(80, reg32, regmem32, none, "0FBD/r", {optO32}, {cpu386});
AddInstruction(81, reg64, regmem64, none, "0FBD/r", {}, {cpuAMD64});
EndMnemonic(opBSR, 81);
StartMnemonic(opBSWAP, "BSWAP", 82);
AddInstruction(82, reg32, none, none, "0FC8rd", {optO32}, {cpu486});
AddInstruction(83, reg64, none, none, "0FC8rq", {}, {cpuAMD64});
EndMnemonic(opBSWAP, 83);
StartMnemonic(opBT, "BT", 84);
AddInstruction(84, regmem16, reg16, none, "0FA3/r", {optO16}, {cpu386});
AddInstruction(85, regmem32, reg32, none, "0FA3/r", {optO32}, {cpu386});
AddInstruction(86, regmem64, reg64, none, "0FA3/r", {}, {cpuAMD64});
AddInstruction(87, regmem16, uimm8, none, "0FBA/4ib", {optO16}, {cpu386});
AddInstruction(88, regmem32, uimm8, none, "0FBA/4ib", {optO32}, {cpu386});
AddInstruction(89, regmem64, uimm8, none, "0FBA/4ib", {}, {cpuAMD64});
EndMnemonic(opBT, 89);
StartMnemonic(opBTC, "BTC", 90);
AddInstruction(90, regmem16, reg16, none, "0FBB/r", {optO16}, {cpu386});
AddInstruction(91, regmem32, reg32, none, "0FBB/r", {optO32}, {cpu386});
AddInstruction(92, regmem64, reg64, none, "0FBB/r", {}, {cpuAMD64});
AddInstruction(93, regmem16, uimm8, none, "0FBA/7ib", {optO16}, {cpu386});
AddInstruction(94, regmem32, uimm8, none, "0FBA/7ib", {optO32}, {cpu386});
AddInstruction(95, regmem64, uimm8, none, "0FBA/7ib", {}, {cpuAMD64});
EndMnemonic(opBTC, 95);
StartMnemonic(opBTR, "BTR", 96);
AddInstruction(96, regmem16, reg16, none, "0FB3/r", {optO16}, {cpu386});
AddInstruction(97, regmem32, reg32, none, "0FB3/r", {optO32}, {cpu386});
AddInstruction(98, regmem64, reg64, none, "0FB3/r", {}, {cpuAMD64});
AddInstruction(99, regmem16, uimm8, none, "0FBA/6ib", {optO16}, {cpu386});
AddInstruction(100, regmem32, uimm8, none, "0FBA/6ib", {optO32}, {cpu386});
AddInstruction(101, regmem64, uimm8, none, "0FBA/6ib", {}, {cpuAMD64});
EndMnemonic(opBTR, 101);
StartMnemonic(opBTS, "BTS", 102);
AddInstruction(102, regmem16, reg16, none, "0FAB/r", {optO16}, {cpu386});
AddInstruction(103, regmem32, reg32, none, "0FAB/r", {optO32}, {cpu386});
AddInstruction(104, regmem64, reg64, none, "0FAB/r", {}, {cpuAMD64});
AddInstruction(105, regmem16, uimm8, none, "0FBA/5ib", {optO16}, {cpu386});
AddInstruction(106, regmem32, uimm8, none, "0FBA/5ib", {optO32}, {cpu386});
AddInstruction(107, regmem64, uimm8, none, "0FBA/5ib", {}, {cpuAMD64});
EndMnemonic(opBTS, 107);
StartMnemonic(opCALL, "CALL", 108);
AddInstruction(108, rel16off, none, none, "E8iw", {optO16}, {cpu8086});
AddInstruction(109, rel32off, none, none, "E8id", {optO32}, {cpu8086});
AddInstruction(110, regmem16, none, none, "FF/2", {optO16}, {cpu8086});
AddInstruction(111, regmem32, none, none, "FF/2", {optO32}, {cpu386});
AddInstruction(112, regmem64, none, none, "FF/2", {optO64}, {cpuAMD64});
EndMnemonic(opCALL, 112);
StartMnemonic(opCALLFAR, "CALLFAR", 113);
AddInstruction(113, pntr1616, none, none, "9Acd", {optNot64}, {cpu8086});
AddInstruction(114, pntr1632, none, none, "9Acp", {optNot64}, {cpu386});
AddInstruction(115, mem, none, none, "FF/3", {optO16,optNot64}, {cpu8086});
AddInstruction(116, mem, none, none, "FF/3", {optO32,optNot64}, {cpu386});
EndMnemonic(opCALLFAR, 116);
StartMnemonic(opCBW, "CBW", 117);
AddInstruction(117, none, none, none, "98", {optO16}, {cpu8086});
EndMnemonic(opCBW, 117);
StartMnemonic(opCDQ, "CDQ", 118);
AddInstruction(118, none, none, none, "99", {optO32}, {cpu386});
EndMnemonic(opCDQ, 118);
StartMnemonic(opCDQE, "CDQE", 119);
AddInstruction(119, none, none, none, "98", {}, {cpuAMD64});
EndMnemonic(opCDQE, 119);
StartMnemonic(opCFLUSH, "CFLUSH", 120);
AddInstruction(120, mem8, none, none, "0FAE/7", {}, {cpuSSE2});
EndMnemonic(opCFLUSH, 120);
StartMnemonic(opCLC, "CLC", 121);
AddInstruction(121, none, none, none, "F8", {}, {cpu8086});
EndMnemonic(opCLC, 121);
StartMnemonic(opCLD, "CLD", 122);
AddInstruction(122, none, none, none, "FC", {}, {cpu8086});
EndMnemonic(opCLD, 122);
StartMnemonic(opCLGI, "CLGI", 123);
AddInstruction(123, none, none, none, "0F01DD", {}, {cpuAMD64});
EndMnemonic(opCLGI, 123);
StartMnemonic(opCLI, "CLI", 124);
AddInstruction(124, none, none, none, "FA", {}, {cpu8086});
EndMnemonic(opCLI, 124);
StartMnemonic(opCLTS, "CLTS", 125);
AddInstruction(125, none, none, none, "0F06", {}, {cpu286,cpuPrivileged});
EndMnemonic(opCLTS, 125);
StartMnemonic(opCMC, "CMC", 126);
AddInstruction(126, none, none, none, "F5", {}, {cpu8086});
EndMnemonic(opCMC, 126);
StartMnemonic(opCMOVA, "CMOVA", 127);
AddInstruction(127, reg16, regmem16, none, "0F47/r", {optO16}, {cpuP6});
AddInstruction(128, reg32, regmem32, none, "0F47/r", {optO32}, {cpuP6});
AddInstruction(129, reg64, regmem64, none, "0F47/r", {}, {cpuAMD64});
EndMnemonic(opCMOVA, 129);
StartMnemonic(opCMOVAE, "CMOVAE", 130);
AddInstruction(130, reg16, regmem16, none, "0F43/r", {optO16}, {cpuP6});
AddInstruction(131, reg32, regmem32, none, "0F43/r", {optO32}, {cpuP6});
AddInstruction(132, reg64, regmem64, none, "0F43/r", {}, {cpuAMD64});
EndMnemonic(opCMOVAE, 132);
StartMnemonic(opCMOVB, "CMOVB", 133);
AddInstruction(133, reg16, regmem16, none, "0F42/r", {optO16}, {cpuP6});
AddInstruction(134, reg32, regmem32, none, "0F42/r", {optO32}, {cpuP6});
AddInstruction(135, reg64, regmem64, none, "0F42/r", {}, {cpuAMD64});
EndMnemonic(opCMOVB, 135);
StartMnemonic(opCMOVBE, "CMOVBE", 136);
AddInstruction(136, reg16, regmem16, none, "0F46/r", {optO16}, {cpuP6});
AddInstruction(137, reg32, regmem32, none, "0F46/r", {optO32}, {cpuP6});
AddInstruction(138, reg64, regmem64, none, "0F46/r", {}, {cpuAMD64});
EndMnemonic(opCMOVBE, 138);
StartMnemonic(opCMOVC, "CMOVC", 139);
AddInstruction(139, reg16, regmem16, none, "0F42/r", {optO16}, {cpuP6});
AddInstruction(140, reg32, regmem32, none, "0F42/r", {optO32}, {cpuP6});
AddInstruction(141, reg64, regmem64, none, "0F42/r", {}, {cpuAMD64});
EndMnemonic(opCMOVC, 141);
StartMnemonic(opCMOVE, "CMOVE", 142);
AddInstruction(142, reg16, regmem16, none, "0F44/r", {optO16}, {cpuP6});
AddInstruction(143, reg32, regmem32, none, "0F44/r", {optO32}, {cpuP6});
AddInstruction(144, reg64, regmem64, none, "0F44/r", {}, {cpuAMD64});
EndMnemonic(opCMOVE, 144);
StartMnemonic(opCMOVG, "CMOVG", 145);
AddInstruction(145, reg16, regmem16, none, "0F4F/r", {optO16}, {cpuP6});
AddInstruction(146, reg32, regmem32, none, "0F4F/r", {optO32}, {cpuP6});
AddInstruction(147, reg64, regmem64, none, "0F4F/r", {}, {cpuAMD64});
EndMnemonic(opCMOVG, 147);
StartMnemonic(opCMOVGE, "CMOVGE", 148);
AddInstruction(148, reg16, regmem16, none, "0F4D/r", {optO16}, {cpuP6});
AddInstruction(149, reg32, regmem32, none, "0F4D/r", {optO32}, {cpuP6});
AddInstruction(150, reg64, regmem64, none, "0F4D/r", {}, {cpuAMD64});
EndMnemonic(opCMOVGE, 150);
StartMnemonic(opCMOVL, "CMOVL", 151);
AddInstruction(151, reg16, regmem16, none, "0F4C/r", {optO16}, {cpuP6});
AddInstruction(152, reg32, regmem32, none, "0F4C/r", {optO32}, {cpuP6});
AddInstruction(153, reg64, regmem64, none, "0F4C/r", {}, {cpuAMD64});
EndMnemonic(opCMOVL, 153);
StartMnemonic(opCMOVLE, "CMOVLE", 154);
AddInstruction(154, reg16, regmem16, none, "0F4E/r", {optO16}, {cpuP6});
AddInstruction(155, reg32, regmem32, none, "0F4E/r", {optO32}, {cpuP6});
AddInstruction(156, reg64, regmem64, none, "0F4E/r", {}, {cpuAMD64});
EndMnemonic(opCMOVLE, 156);
StartMnemonic(opCMOVNA, "CMOVNA", 157);
AddInstruction(157, reg16, regmem16, none, "0F46/r", {optO16}, {cpuP6});
AddInstruction(158, reg32, regmem32, none, "0F46/r", {optO32}, {cpuP6});
AddInstruction(159, reg64, regmem64, none, "0F46/r", {}, {cpuAMD64});
EndMnemonic(opCMOVNA, 159);
StartMnemonic(opCMOVNAE, "CMOVNAE", 160);
AddInstruction(160, reg16, regmem16, none, "0F42/r", {optO16}, {cpuP6});
AddInstruction(161, reg32, regmem32, none, "0F42/r", {optO32}, {cpuP6});
AddInstruction(162, reg64, regmem64, none, "0F42/r", {}, {cpuAMD64});
EndMnemonic(opCMOVNAE, 162);
StartMnemonic(opCMOVNB, "CMOVNB", 163);
AddInstruction(163, reg16, regmem16, none, "0F43/r", {optO16}, {cpuP6});
AddInstruction(164, reg32, regmem32, none, "0F43/r", {optO32}, {cpuP6});
AddInstruction(165, reg64, regmem64, none, "0F43/r", {}, {cpuAMD64});
EndMnemonic(opCMOVNB, 165);
StartMnemonic(opCMOVNBE, "CMOVNBE", 166);
AddInstruction(166, reg16, regmem16, none, "0F47/r", {optO16}, {cpuP6});
AddInstruction(167, reg32, regmem32, none, "0F47/r", {optO32}, {cpuP6});
AddInstruction(168, reg64, regmem64, none, "0F47/r", {}, {cpuAMD64});
EndMnemonic(opCMOVNBE, 168);
StartMnemonic(opCMOVNC, "CMOVNC", 169);
AddInstruction(169, reg16, regmem16, none, "0F43/r", {optO16}, {cpuP6});
AddInstruction(170, reg32, regmem32, none, "0F43/r", {optO32}, {cpuP6});
AddInstruction(171, reg64, regmem64, none, "0F43/r", {}, {cpuAMD64});
EndMnemonic(opCMOVNC, 171);
StartMnemonic(opCMOVNE, "CMOVNE", 172);
AddInstruction(172, reg16, regmem16, none, "0F45/r", {optO16}, {cpuP6});
AddInstruction(173, reg32, regmem32, none, "0F45/r", {optO32}, {cpuP6});
AddInstruction(174, reg64, regmem64, none, "0F45/r", {}, {cpuAMD64});
EndMnemonic(opCMOVNE, 174);
StartMnemonic(opCMOVNG, "CMOVNG", 175);
AddInstruction(175, reg16, regmem16, none, "0F4E/r", {optO16}, {cpuP6});
AddInstruction(176, reg32, regmem32, none, "0F4E/r", {optO32}, {cpuP6});
AddInstruction(177, reg64, regmem64, none, "0F4E/r", {}, {cpuAMD64});
EndMnemonic(opCMOVNG, 177);
StartMnemonic(opCMOVNGE, "CMOVNGE", 178);
AddInstruction(178, reg16, regmem16, none, "0F4C/r", {optO16}, {cpuP6});
AddInstruction(179, reg32, regmem32, none, "0F4C/r", {optO32}, {cpuP6});
AddInstruction(180, reg64, regmem64, none, "0F4C/r", {}, {cpuAMD64});
EndMnemonic(opCMOVNGE, 180);
StartMnemonic(opCMOVNL, "CMOVNL", 181);
AddInstruction(181, reg16, regmem16, none, "0F4D/r", {optO16}, {cpuP6});
AddInstruction(182, reg32, regmem32, none, "0F4D/r", {optO32}, {cpuP6});
AddInstruction(183, reg64, regmem64, none, "0F4D/r", {}, {cpuAMD64});
EndMnemonic(opCMOVNL, 183);
StartMnemonic(opCMOVNLE, "CMOVNLE", 184);
AddInstruction(184, reg16, regmem16, none, "0F4F/r", {optO16}, {cpuP6});
AddInstruction(185, reg32, regmem32, none, "0F4F/r", {optO32}, {cpuP6});
AddInstruction(186, reg64, regmem64, none, "0F4F/r", {}, {cpuAMD64});
EndMnemonic(opCMOVNLE, 186);
StartMnemonic(opCMOVNO, "CMOVNO", 187);
AddInstruction(187, reg16, regmem16, none, "0F41/r", {optO16}, {cpuP6});
AddInstruction(188, reg32, regmem32, none, "0F41/r", {optO32}, {cpuP6});
AddInstruction(189, reg64, regmem64, none, "0F41/r", {}, {cpuAMD64});
EndMnemonic(opCMOVNO, 189);
StartMnemonic(opCMOVNP, "CMOVNP", 190);
AddInstruction(190, reg16, regmem16, none, "0F4B/r", {optO16}, {cpuP6});
AddInstruction(191, reg32, regmem32, none, "0F4B/r", {optO32}, {cpuP6});
AddInstruction(192, reg64, regmem64, none, "0F4B/r", {}, {cpuAMD64});
EndMnemonic(opCMOVNP, 192);
StartMnemonic(opCMOVNS, "CMOVNS", 193);
AddInstruction(193, reg16, regmem16, none, "0F49/r", {optO16}, {cpuP6});
AddInstruction(194, reg32, regmem32, none, "0F49/r", {optO32}, {cpuP6});
AddInstruction(195, reg64, regmem64, none, "0F49/r", {}, {cpuAMD64});
EndMnemonic(opCMOVNS, 195);
StartMnemonic(opCMOVNZ, "CMOVNZ", 196);
AddInstruction(196, reg16, regmem16, none, "0F45/r", {optO16}, {cpuP6});
AddInstruction(197, reg32, regmem32, none, "0F45/r", {optO32}, {cpuP6});
AddInstruction(198, reg64, regmem64, none, "0F45/r", {}, {cpuAMD64});
EndMnemonic(opCMOVNZ, 198);
StartMnemonic(opCMOVO, "CMOVO", 199);
AddInstruction(199, reg16, regmem16, none, "0F40/r", {optO16}, {cpuP6});
AddInstruction(200, reg32, regmem32, none, "0F40/r", {optO32}, {cpuP6});
AddInstruction(201, reg64, regmem64, none, "0F40/r", {}, {cpuAMD64});
EndMnemonic(opCMOVO, 201);
StartMnemonic(opCMOVP, "CMOVP", 202);
AddInstruction(202, reg16, regmem16, none, "0F4A/r", {optO16}, {cpuP6});
AddInstruction(203, reg32, regmem32, none, "0F4A/r", {optO32}, {cpuP6});
AddInstruction(204, reg64, regmem64, none, "0F4A/r", {}, {cpuAMD64});
EndMnemonic(opCMOVP, 204);
StartMnemonic(opCMOVPE, "CMOVPE", 205);
AddInstruction(205, reg16, regmem16, none, "0F4A/r", {optO16}, {cpuP6});
AddInstruction(206, reg32, regmem32, none, "0F4A/r", {optO32}, {cpuP6});
AddInstruction(207, reg64, regmem64, none, "0F4A/r", {}, {cpuAMD64});
EndMnemonic(opCMOVPE, 207);
StartMnemonic(opCMOVPO, "CMOVPO", 208);
AddInstruction(208, reg16, regmem16, none, "0F4B/r", {optO16}, {cpuP6});
AddInstruction(209, reg32, regmem32, none, "0F4B/r", {optO32}, {cpuP6});
AddInstruction(210, reg64, regmem64, none, "0F4B/r", {}, {cpuAMD64});
EndMnemonic(opCMOVPO, 210);
StartMnemonic(opCMOVS, "CMOVS", 211);
AddInstruction(211, reg16, regmem16, none, "0F48/r", {optO16}, {cpuP6});
AddInstruction(212, reg32, regmem32, none, "0F48/r", {optO32}, {cpuP6});
AddInstruction(213, reg64, regmem64, none, "0F48/r", {}, {cpuAMD64});
EndMnemonic(opCMOVS, 213);
StartMnemonic(opCMOVZ, "CMOVZ", 214);
AddInstruction(214, reg16, regmem16, none, "0F44/r", {optO16}, {cpuP6});
AddInstruction(215, reg32, regmem32, none, "0F44/r", {optO32}, {cpuP6});
AddInstruction(216, reg64, regmem64, none, "0F44/r", {}, {cpuAMD64});
EndMnemonic(opCMOVZ, 216);
StartMnemonic(opCMP, "CMP", 217);
AddInstruction(217, regmem8, reg8, none, "38/r", {}, {cpu8086});
AddInstruction(218, regmem16, reg16, none, "39/r", {optO16}, {cpu8086});
AddInstruction(219, regmem32, reg32, none, "39/r", {optO32}, {cpu386});
AddInstruction(220, regmem64, reg64, none, "39/r", {}, {cpuAMD64});
AddInstruction(221, reg8, regmem8, none, "3A/r", {}, {cpu8086});
AddInstruction(222, reg16, regmem16, none, "3B/r", {optO16}, {cpu8086});
AddInstruction(223, reg32, regmem32, none, "3B/r", {optO32}, {cpu386});
AddInstruction(224, reg64, regmem64, none, "3B/r", {}, {cpuAMD64});
AddInstruction(225, AL, imm8, none, "3Cib", {}, {cpu8086});
AddInstruction(226, AX, imm16, none, "3Diw", {optO16}, {cpu8086});
AddInstruction(227, EAX, imm32, none, "3Did", {optO32}, {cpu386});
AddInstruction(228, RAX, imm32, none, "3Did", {}, {cpuAMD64});
AddInstruction(229, regmem8, imm8, none, "80/7ib", {}, {cpu8086});
AddInstruction(230, regmem16, imm16, none, "81/7iw", {optO16}, {cpu8086});
AddInstruction(231, regmem32, imm32, none, "81/7id", {optO32}, {cpu386});
AddInstruction(232, regmem64, imm32, none, "81/7id", {}, {cpuAMD64});
AddInstruction(233, regmem16, simm8, none, "83/7ib", {optO16}, {cpu8086});
AddInstruction(234, regmem32, simm8, none, "83/7ib", {optO32}, {cpu386});
AddInstruction(235, regmem64, simm8, none, "83/7ib", {}, {cpuAMD64});
EndMnemonic(opCMP, 235);
StartMnemonic(opCMPPD, "CMPPD", 236);
AddInstruction(236, xmm, xmmmem128, uimm8, "660FC2/rib", {}, {cpuSSE2});
EndMnemonic(opCMPPD, 236);
StartMnemonic(opCMPPS, "CMPPS", 237);
AddInstruction(237, xmm, xmmmem128, uimm8, "0FC2/rib", {}, {cpuSSE});
EndMnemonic(opCMPPS, 237);
StartMnemonic(opCMPS, "CMPS", 238);
AddInstruction(238, mem8, mem8, none, "A6", {}, {cpu8086});
AddInstruction(239, mem16, mem16, none, "A7", {optO16}, {cpu8086});
AddInstruction(240, mem32, mem32, none, "A7", {optO32}, {cpu386});
AddInstruction(241, mem64, mem64, none, "A7", {}, {cpuAMD64});
EndMnemonic(opCMPS, 241);
StartMnemonic(opCMPSB, "CMPSB", 242);
AddInstruction(242, none, none, none, "A6", {}, {cpu8086});
EndMnemonic(opCMPSB, 242);
StartMnemonic(opCMPSD, "CMPSD", 243);
AddInstruction(243, none, none, none, "A7", {optO32}, {cpu386});
AddInstruction(244, xmm, xmmmem64, uimm8, "F20FC2/rib", {}, {cpuSSE2});
EndMnemonic(opCMPSD, 244);
StartMnemonic(opCMPSQ, "CMPSQ", 245);
AddInstruction(245, none, none, none, "A7", {}, {cpuAMD64});
EndMnemonic(opCMPSQ, 245);
StartMnemonic(opCMPSS, "CMPSS", 246);
AddInstruction(246, xmm, xmmmem32, uimm8, "F30FC2/rib", {}, {cpuSSE});
EndMnemonic(opCMPSS, 246);
StartMnemonic(opCMPSW, "CMPSW", 247);
AddInstruction(247, none, none, none, "A7", {optO16}, {cpu8086});
EndMnemonic(opCMPSW, 247);
StartMnemonic(opCMPXCHG, "CMPXCHG", 248);
AddInstruction(248, regmem8, reg8, none, "0FB0/r", {}, {cpuPentium});
AddInstruction(249, regmem16, reg16, none, "0FB1/r", {optO16}, {cpuPentium});
AddInstruction(250, regmem32, reg32, none, "0FB1/r", {optO32}, {cpuPentium});
AddInstruction(251, regmem64, reg64, none, "0FB1/r", {}, {cpuAMD64});
EndMnemonic(opCMPXCHG, 251);
StartMnemonic(opCMPXCHG16B, "CMPXCHG16B", 252);
AddInstruction(252, mem128, none, none, "0FC7/1m1", {}, {cpuSSE2});
EndMnemonic(opCMPXCHG16B, 252);
StartMnemonic(opCMPXCHG8B, "CMPXCHG8B", 253);
AddInstruction(253, mem64, none, none, "0FC7/1m6", {}, {cpuPentium});
EndMnemonic(opCMPXCHG8B, 253);
StartMnemonic(opCOMISD, "COMISD", 254);
AddInstruction(254, xmm, xmmmem64, none, "660F2F/r", {}, {cpuSSE2});
EndMnemonic(opCOMISD, 254);
StartMnemonic(opCOMISS, "COMISS", 255);
AddInstruction(255, xmm, xmmmem32, none, "0F2F/r", {}, {cpuSSE});
EndMnemonic(opCOMISS, 255);
StartMnemonic(opCPUID, "CPUID", 256);
AddInstruction(256, none, none, none, "0FA2", {}, {cpuPentium});
EndMnemonic(opCPUID, 256);
StartMnemonic(opCQO, "CQO", 257);
AddInstruction(257, none, none, none, "99", {optO64}, {cpuAMD64});
EndMnemonic(opCQO, 257);
StartMnemonic(opCVTDQ2PD, "CVTDQ2PD", 258);
AddInstruction(258, xmm, xmmmem64, none, "F30FE6/r", {}, {cpuSSE2});
EndMnemonic(opCVTDQ2PD, 258);
StartMnemonic(opCVTDQ2PS, "CVTDQ2PS", 259);
AddInstruction(259, xmm, xmmmem128, none, "0F5B/r", {}, {cpuSSE2});
EndMnemonic(opCVTDQ2PS, 259);
StartMnemonic(opCVTPD2DQ, "CVTPD2DQ", 260);
AddInstruction(260, xmm, xmmmem128, none, "F20FE6/r", {}, {cpuSSE2});
EndMnemonic(opCVTPD2DQ, 260);
StartMnemonic(opCVTPD2PI, "CVTPD2PI", 261);
AddInstruction(261, mmx, xmmmem128, none, "660F2D/r", {}, {cpuSSE2});
AddInstruction(262, mmx, xmmmem128, none, "660F2D/r", {}, {cpuSSE2});
AddInstruction(263, mmx, xmmmem128, none, "660F2C/r", {}, {cpuSSE2});
EndMnemonic(opCVTPD2PI, 263);
StartMnemonic(opCVTPD2PS, "CVTPD2PS", 264);
AddInstruction(264, xmm, xmmmem128, none, "660F5A/r", {}, {cpuSSE2});
EndMnemonic(opCVTPD2PS, 264);
StartMnemonic(opCVTPI2PD, "CVTPI2PD", 265);
AddInstruction(265, xmm, mmxmem64, none, "660F2A/r", {}, {cpuSSE2});
AddInstruction(266, xmm, mmxmem64, none, "660F2A/r", {}, {cpuSSE2});
EndMnemonic(opCVTPI2PD, 266);
StartMnemonic(opCVTPI2PS, "CVTPI2PS", 267);
AddInstruction(267, xmm, mmxmem64, none, "0F2A/r", {}, {cpuSSE});
AddInstruction(268, xmm, mmxmem64, none, "0F2A/r", {}, {cpuSSE});
EndMnemonic(opCVTPI2PS, 268);
StartMnemonic(opCVTPS2DQ, "CVTPS2DQ", 269);
AddInstruction(269, xmm, xmmmem128, none, "660F5B/r", {}, {cpuSSE2});
EndMnemonic(opCVTPS2DQ, 269);
StartMnemonic(opCVTPS2PD, "CVTPS2PD", 270);
AddInstruction(270, xmm, xmmmem64, none, "0F5A/r", {}, {cpuSSE2});
EndMnemonic(opCVTPS2PD, 270);
StartMnemonic(opCVTPS2PI, "CVTPS2PI", 271);
AddInstruction(271, mmx, xmmmem64, none, "0F2D/r", {}, {cpuSSE});
AddInstruction(272, mmx, xmmmem64, none, "0F2D/r", {}, {cpuSSE});
EndMnemonic(opCVTPS2PI, 272);
StartMnemonic(opCVTSD2SI, "CVTSD2SI", 273);
AddInstruction(273, reg32, xmmmem64, none, "F20F2D/r", {}, {cpuSSE2});
AddInstruction(274, reg64, xmmmem64, none, "F20F2D/r", {}, {cpuAMD64,cpuSSE2});
EndMnemonic(opCVTSD2SI, 274);
StartMnemonic(opCVTSD2SS, "CVTSD2SS", 275);
AddInstruction(275, xmm, xmmmem64, none, "F20F5A/r", {}, {cpuSSE2});
EndMnemonic(opCVTSD2SS, 275);
StartMnemonic(opCVTSI2SD, "CVTSI2SD", 276);
AddInstruction(276, xmm, regmem32, none, "F20F2A/r", {}, {cpuSSE2});
AddInstruction(277, xmm, regmem64, none, "F20F2A/r", {}, {cpuAMD64,cpuSSE2});
EndMnemonic(opCVTSI2SD, 277);
StartMnemonic(opCVTSI2SS, "CVTSI2SS", 278);
AddInstruction(278, xmm, regmem32, none, "F30F2A/r", {}, {cpuSSE});
AddInstruction(279, xmm, regmem64, none, "F30F2A/r", {}, {cpuAMD64,cpuSSE});
EndMnemonic(opCVTSI2SS, 279);
StartMnemonic(opCVTSS2SD, "CVTSS2SD", 280);
AddInstruction(280, xmm, xmmmem32, none, "F30F5A/r", {}, {cpuSSE2});
EndMnemonic(opCVTSS2SD, 280);
StartMnemonic(opCVTSS2SI, "CVTSS2SI", 281);
AddInstruction(281, reg32, xmmmem32, none, "F30F2D/r", {}, {cpuSSE});
AddInstruction(282, reg64, xmmmem32, none, "F30F2D/r", {}, {cpuAMD64,cpuSSE});
EndMnemonic(opCVTSS2SI, 282);
StartMnemonic(opCVTTPD2DQ, "CVTTPD2DQ", 283);
AddInstruction(283, xmm, xmmmem128, none, "660FE6/r", {}, {cpuSSE2});
EndMnemonic(opCVTTPD2DQ, 283);
StartMnemonic(opCVTTPD2PI, "CVTTPD2PI", 284);
AddInstruction(284, mmx, xmmmem128, none, "660F2C/r", {}, {cpuSSE2});
EndMnemonic(opCVTTPD2PI, 284);
StartMnemonic(opCVTTPS2DQ, "CVTTPS2DQ", 285);
AddInstruction(285, xmm, xmmmem128, none, "F30F5B/r", {}, {cpuSSE2});
EndMnemonic(opCVTTPS2DQ, 285);
StartMnemonic(opCVTTPS2PI, "CVTTPS2PI", 286);
AddInstruction(286, mmx, xmmmem64, none, "0F2C/r", {}, {cpuSSE});
AddInstruction(287, mmx, xmmmem64, none, "0F2C/r", {}, {cpuSSE});
EndMnemonic(opCVTTPS2PI, 287);
StartMnemonic(opCVTTSD2SI, "CVTTSD2SI", 288);
AddInstruction(288, reg32, xmmmem64, none, "F20F2C/r", {}, {cpuSSE2});
AddInstruction(289, reg64, xmmmem64, none, "F20F2C/r", {}, {cpuAMD64,cpuSSE2});
EndMnemonic(opCVTTSD2SI, 289);
StartMnemonic(opCVTTSS2SI, "CVTTSS2SI", 290);
AddInstruction(290, reg32, xmmmem32, none, "F30F2C/r", {}, {cpuSSE});
AddInstruction(291, reg64, xmmmem32, none, "F30F2C/r", {}, {cpuAMD64,cpuSSE});
EndMnemonic(opCVTTSS2SI, 291);
StartMnemonic(opCWD, "CWD", 292);
AddInstruction(292, none, none, none, "99", {optO16}, {cpu8086});
EndMnemonic(opCWD, 292);
StartMnemonic(opCWDE, "CWDE", 293);
AddInstruction(293, none, none, none, "98", {optO32}, {cpu386});
EndMnemonic(opCWDE, 293);
StartMnemonic(opDAA, "DAA", 294);
AddInstruction(294, none, none, none, "27", {optNot64}, {cpu8086});
EndMnemonic(opDAA, 294);
StartMnemonic(opDAS, "DAS", 295);
AddInstruction(295, none, none, none, "2F", {optNot64}, {cpu8086});
EndMnemonic(opDAS, 295);
StartMnemonic(opDEC, "DEC", 296);
AddInstruction(296, reg16, none, none, "48rw", {optO16}, {cpu8086});
AddInstruction(297, reg32, none, none, "48rd", {optO32}, {cpu386});
AddInstruction(298, regmem8, none, none, "FE/1", {}, {cpu8086});
AddInstruction(299, regmem16, none, none, "FF/1", {optO16}, {cpu8086});
AddInstruction(300, regmem32, none, none, "FF/1", {optO32}, {cpu386});
AddInstruction(301, regmem64, none, none, "FF/1", {}, {cpuAMD64});
EndMnemonic(opDEC, 301);
StartMnemonic(opDIV, "DIV", 302);
AddInstruction(302, regmem8, none, none, "F6/6", {}, {cpu8086});
AddInstruction(303, regmem16, none, none, "F7/6", {optO16}, {cpu8086});
AddInstruction(304, regmem32, none, none, "F7/6", {optO32}, {cpu386});
AddInstruction(305, regmem64, none, none, "F7/6", {}, {cpuAMD64});
EndMnemonic(opDIV, 305);
StartMnemonic(opDIVPD, "DIVPD", 306);
AddInstruction(306, xmm, xmmmem128, none, "660F5E/r", {}, {cpuSSE2});
EndMnemonic(opDIVPD, 306);
StartMnemonic(opDIVPS, "DIVPS", 307);
AddInstruction(307, xmm, xmmmem128, none, "0F5E/r", {}, {cpuSSE});
EndMnemonic(opDIVPS, 307);
StartMnemonic(opDIVSD, "DIVSD", 308);
AddInstruction(308, xmm, xmmmem64, none, "F20F5E/r", {}, {cpuSSE2});
EndMnemonic(opDIVSD, 308);
StartMnemonic(opDIVSS, "DIVSS", 309);
AddInstruction(309, xmm, xmmmem32, none, "F30F5E/r", {}, {cpuSSE});
EndMnemonic(opDIVSS, 309);
StartMnemonic(opEMMS, "EMMS", 310);
AddInstruction(310, none, none, none, "0F77", {}, {cpuMMX});
EndMnemonic(opEMMS, 310);
StartMnemonic(opENTER, "ENTER", 311);
AddInstruction(311, uimm16, uimm8, none, "C8iwib", {}, {cpu186});
EndMnemonic(opENTER, 311);
StartMnemonic(opF2XM1, "F2XM1", 312);
AddInstruction(312, none, none, none, "D9F0", {}, {cpu8086,cpuFPU});
EndMnemonic(opF2XM1, 312);
StartMnemonic(opFABS, "FABS", 313);
AddInstruction(313, none, none, none, "D9E1", {}, {cpu8086,cpuFPU});
EndMnemonic(opFABS, 313);
StartMnemonic(opFADD, "FADD", 314);
AddInstruction(314, mem32, none, none, "D8/0", {}, {cpu8086,cpuFPU});
AddInstruction(315, mem64, none, none, "DC/0", {}, {cpu8086,cpuFPU});
AddInstruction(316, st0, sti, none, "D8C0+i", {}, {cpu8086,cpuFPU});
AddInstruction(317, sti, st0, none, "DCC0+i", {}, {cpu8086,cpuFPU});
EndMnemonic(opFADD, 317);
StartMnemonic(opFADDP, "FADDP", 318);
AddInstruction(318, none, none, none, "DEC1", {}, {cpu8086,cpuFPU});
AddInstruction(319, sti, st0, none, "DEC0+i", {}, {cpu8086,cpuFPU});
EndMnemonic(opFADDP, 319);
StartMnemonic(opFBLD, "FBLD", 320);
AddInstruction(320, mem, none, none, "DF/4", {}, {cpu8086,cpuFPU});
EndMnemonic(opFBLD, 320);
StartMnemonic(opFBSTP, "FBSTP", 321);
AddInstruction(321, mem, none, none, "DF/6", {}, {cpu8086,cpuFPU});
EndMnemonic(opFBSTP, 321);
StartMnemonic(opFCHS, "FCHS", 322);
AddInstruction(322, none, none, none, "D9E0", {}, {cpu8086,cpuFPU});
EndMnemonic(opFCHS, 322);
StartMnemonic(opFCLEX, "FCLEX", 323);
AddInstruction(323, none, none, none, "9BDBE2", {}, {cpu8086,cpuFPU});
EndMnemonic(opFCLEX, 323);
StartMnemonic(opFCMOVB, "FCMOVB", 324);
AddInstruction(324, st0, sti, none, "DAC0+i", {}, {cpuP6,cpuFPU});
EndMnemonic(opFCMOVB, 324);
StartMnemonic(opFCMOVBE, "FCMOVBE", 325);
AddInstruction(325, st0, sti, none, "DAD0+i", {}, {cpuP6,cpuFPU});
EndMnemonic(opFCMOVBE, 325);
StartMnemonic(opFCMOVE, "FCMOVE", 326);
AddInstruction(326, st0, sti, none, "DAC8+i", {}, {cpuP6,cpuFPU});
EndMnemonic(opFCMOVE, 326);
StartMnemonic(opFCMOVNB, "FCMOVNB", 327);
AddInstruction(327, st0, sti, none, "DBC0+i", {}, {cpuP6,cpuFPU});
EndMnemonic(opFCMOVNB, 327);
StartMnemonic(opFCMOVNBE, "FCMOVNBE", 328);
AddInstruction(328, st0, sti, none, "DBD0+i", {}, {cpuP6,cpuFPU});
EndMnemonic(opFCMOVNBE, 328);
StartMnemonic(opFCMOVNE, "FCMOVNE", 329);
AddInstruction(329, st0, sti, none, "DBC8+i", {}, {cpuP6,cpuFPU});
EndMnemonic(opFCMOVNE, 329);
StartMnemonic(opFCMOVNU, "FCMOVNU", 330);
AddInstruction(330, st0, sti, none, "DBD8+i", {}, {cpuP6,cpuFPU});
EndMnemonic(opFCMOVNU, 330);
StartMnemonic(opFCMOVU, "FCMOVU", 331);
AddInstruction(331, st0, sti, none, "DAD8+i", {}, {cpuP6,cpuFPU});
EndMnemonic(opFCMOVU, 331);
StartMnemonic(opFCOM, "FCOM", 332);
AddInstruction(332, none, none, none, "D8D1", {}, {cpu8086,cpuFPU});
AddInstruction(333, sti, none, none, "D8D0+i", {}, {cpu8086,cpuFPU});
AddInstruction(334, mem32, none, none, "D8/2", {}, {cpu8086,cpuFPU});
AddInstruction(335, mem64, none, none, "DC/2", {}, {cpu8086,cpuFPU});
EndMnemonic(opFCOM, 335);
StartMnemonic(opFCOMI, "FCOMI", 336);
AddInstruction(336, st0, sti, none, "DBF0+i", {}, {cpuP6,cpuFPU});
EndMnemonic(opFCOMI, 336);
StartMnemonic(opFCOMIP, "FCOMIP", 337);
AddInstruction(337, st0, sti, none, "DFF0+i", {}, {cpuP6,cpuFPU});
EndMnemonic(opFCOMIP, 337);
StartMnemonic(opFCOMP, "FCOMP", 338);
AddInstruction(338, none, none, none, "D8D9", {}, {cpu8086,cpuFPU});
AddInstruction(339, sti, none, none, "D8D8+i", {}, {cpu8086,cpuFPU});
AddInstruction(340, mem32, none, none, "D8/3", {}, {cpu8086,cpuFPU});
AddInstruction(341, mem64, none, none, "DC/3", {}, {cpu8086,cpuFPU});
EndMnemonic(opFCOMP, 341);
StartMnemonic(opFCOMPP, "FCOMPP", 342);
AddInstruction(342, none, none, none, "DED9", {}, {cpu8086,cpuFPU});
EndMnemonic(opFCOMPP, 342);
StartMnemonic(opFCOS, "FCOS", 343);
AddInstruction(343, none, none, none, "D9FF", {}, {cpu386,cpuFPU});
EndMnemonic(opFCOS, 343);
StartMnemonic(opFDECSTP, "FDECSTP", 344);
AddInstruction(344, none, none, none, "D9F6", {}, {cpu8086,cpuFPU});
EndMnemonic(opFDECSTP, 344);
StartMnemonic(opFDIV, "FDIV", 345);
AddInstruction(345, mem32, none, none, "D8/6", {}, {cpu8086,cpuFPU});
AddInstruction(346, mem64, none, none, "DC/6", {}, {cpu8086,cpuFPU});
AddInstruction(347, st0, sti, none, "D8F0+i", {}, {cpu8086,cpuFPU});
AddInstruction(348, sti, st0, none, "DCF8+i", {}, {cpu8086,cpuFPU});
EndMnemonic(opFDIV, 348);
StartMnemonic(opFDIVP, "FDIVP", 349);
AddInstruction(349, none, none, none, "DEF9", {}, {cpu8086,cpuFPU});
AddInstruction(350, sti, st0, none, "DEF8+i", {}, {cpu8086,cpuFPU});
EndMnemonic(opFDIVP, 350);
StartMnemonic(opFDIVR, "FDIVR", 351);
AddInstruction(351, mem32, none, none, "D8/7", {}, {cpu8086,cpuFPU});
AddInstruction(352, mem64, none, none, "DC/7", {}, {cpu8086,cpuFPU});
AddInstruction(353, st0, sti, none, "D8F8+i", {}, {cpu8086,cpuFPU});
AddInstruction(354, sti, st0, none, "DCF0+i", {}, {cpu8086,cpuFPU});
EndMnemonic(opFDIVR, 354);
StartMnemonic(opFDIVRP, "FDIVRP", 355);
AddInstruction(355, none, none, none, "DEF1", {}, {cpu8086,cpuFPU});
AddInstruction(356, sti, st0, none, "DEF0+i", {}, {cpu8086,cpuFPU});
EndMnemonic(opFDIVRP, 356);
StartMnemonic(opFEMMS, "FEMMS", 357);
AddInstruction(357, none, none, none, "0F0E", {}, {cpu3DNow});
EndMnemonic(opFEMMS, 357);
StartMnemonic(opFFREE, "FFREE", 358);
AddInstruction(358, sti, none, none, "DDC0+i", {}, {cpu8086,cpuFPU});
EndMnemonic(opFFREE, 358);
StartMnemonic(opFIADD, "FIADD", 359);
AddInstruction(359, mem16, none, none, "DE/0", {}, {cpu8086,cpuFPU});
AddInstruction(360, mem32, none, none, "DA/0", {}, {cpu8086,cpuFPU});
EndMnemonic(opFIADD, 360);
StartMnemonic(opFICOM, "FICOM", 361);
AddInstruction(361, mem16, none, none, "DE/2", {}, {cpu8086,cpuFPU});
AddInstruction(362, mem32, none, none, "DA/2", {}, {cpu8086,cpuFPU});
EndMnemonic(opFICOM, 362);
StartMnemonic(opFICOMP, "FICOMP", 363);
AddInstruction(363, mem16, none, none, "DE/3", {}, {cpu8086,cpuFPU});
AddInstruction(364, mem32, none, none, "DA/3", {}, {cpu8086,cpuFPU});
EndMnemonic(opFICOMP, 364);
StartMnemonic(opFIDIV, "FIDIV", 365);
AddInstruction(365, mem16, none, none, "DE/6", {}, {cpu8086,cpuFPU});
AddInstruction(366, mem32, none, none, "DA/6", {}, {cpu8086,cpuFPU});
EndMnemonic(opFIDIV, 366);
StartMnemonic(opFIDIVR, "FIDIVR", 367);
AddInstruction(367, mem16, none, none, "DE/7", {}, {cpu8086,cpuFPU});
AddInstruction(368, mem32, none, none, "DA/7", {}, {cpu8086,cpuFPU});
EndMnemonic(opFIDIVR, 368);
StartMnemonic(opFILD, "FILD", 369);
AddInstruction(369, mem16, none, none, "DF/0", {}, {cpu8086,cpuFPU});
AddInstruction(370, mem32, none, none, "DB/0", {}, {cpu8086,cpuFPU});
AddInstruction(371, mem64, none, none, "DF/5", {}, {cpu8086,cpuFPU});
EndMnemonic(opFILD, 371);
StartMnemonic(opFIMUL, "FIMUL", 372);
AddInstruction(372, mem16, none, none, "DE/1", {}, {cpu8086,cpuFPU});
AddInstruction(373, mem32, none, none, "DA/1", {}, {cpu8086,cpuFPU});
EndMnemonic(opFIMUL, 373);
StartMnemonic(opFINCSTP, "FINCSTP", 374);
AddInstruction(374, none, none, none, "D9F7", {}, {cpu8086,cpuFPU});
EndMnemonic(opFINCSTP, 374);
StartMnemonic(opFINIT, "FINIT", 375);
AddInstruction(375, none, none, none, "9BDBE3", {}, {cpu8086,cpuFPU});
EndMnemonic(opFINIT, 375);
StartMnemonic(opFIST, "FIST", 376);
AddInstruction(376, mem16, none, none, "DF/2", {}, {cpu8086,cpuFPU});
AddInstruction(377, mem32, none, none, "DB/2", {}, {cpu8086,cpuFPU});
EndMnemonic(opFIST, 377);
StartMnemonic(opFISTP, "FISTP", 378);
AddInstruction(378, mem16, none, none, "DF/3", {}, {cpu8086,cpuFPU});
AddInstruction(379, mem32, none, none, "DB/3", {}, {cpu8086,cpuFPU});
AddInstruction(380, mem64, none, none, "DF/7", {}, {cpu8086,cpuFPU});
EndMnemonic(opFISTP, 380);
StartMnemonic(opFISTTP, "FISTTP", 381);
AddInstruction(381, mem16, none, none, "DF/1", {}, {cpuFPU});
AddInstruction(382, mem32, none, none, "DB/1", {}, {cpuFPU});
AddInstruction(383, mem64, none, none, "DD/1", {}, {cpuFPU});
EndMnemonic(opFISTTP, 383);
StartMnemonic(opFISUB, "FISUB", 384);
AddInstruction(384, mem16, none, none, "DE/4", {}, {cpu8086,cpuFPU});
AddInstruction(385, mem32, none, none, "DA/4", {}, {cpu8086,cpuFPU});
EndMnemonic(opFISUB, 385);
StartMnemonic(opFISUBR, "FISUBR", 386);
AddInstruction(386, mem16, none, none, "DE/5", {}, {cpu8086,cpuFPU});
AddInstruction(387, mem32, none, none, "DA/5", {}, {cpu8086,cpuFPU});
EndMnemonic(opFISUBR, 387);
StartMnemonic(opFLD, "FLD", 388);
AddInstruction(388, sti, none, none, "D9C0+i", {}, {cpu8086,cpuFPU});
AddInstruction(389, mem32, none, none, "D9/0", {}, {cpu8086,cpuFPU});
AddInstruction(390, mem64, none, none, "DD/0", {}, {cpu8086,cpuFPU});
AddInstruction(391, mem, none, none, "DB/5", {}, {cpu8086,cpuFPU});
EndMnemonic(opFLD, 391);
StartMnemonic(opFLD1, "FLD1", 392);
AddInstruction(392, none, none, none, "D9E8", {}, {cpu8086,cpuFPU});
EndMnemonic(opFLD1, 392);
StartMnemonic(opFLDCW, "FLDCW", 393);
AddInstruction(393, mem16, none, none, "D9/5", {}, {cpu8086,cpuFPU});
EndMnemonic(opFLDCW, 393);
StartMnemonic(opFLDENV, "FLDENV", 394);
AddInstruction(394, mem, none, none, "D9/4", {}, {cpu8086,cpuFPU});
EndMnemonic(opFLDENV, 394);
StartMnemonic(opFLDL2E, "FLDL2E", 395);
AddInstruction(395, none, none, none, "D9EA", {}, {cpu8086,cpuFPU});
EndMnemonic(opFLDL2E, 395);
StartMnemonic(opFLDL2T, "FLDL2T", 396);
AddInstruction(396, none, none, none, "D9E9", {}, {cpu8086,cpuFPU});
EndMnemonic(opFLDL2T, 396);
StartMnemonic(opFLDLG2, "FLDLG2", 397);
AddInstruction(397, none, none, none, "D9EC", {}, {cpu8086,cpuFPU});
EndMnemonic(opFLDLG2, 397);
StartMnemonic(opFLDLN2, "FLDLN2", 398);
AddInstruction(398, none, none, none, "D9ED", {}, {cpu8086,cpuFPU});
EndMnemonic(opFLDLN2, 398);
StartMnemonic(opFLDPI, "FLDPI", 399);
AddInstruction(399, none, none, none, "D9EB", {}, {cpu8086,cpuFPU});
EndMnemonic(opFLDPI, 399);
StartMnemonic(opFLDZ, "FLDZ", 400);
AddInstruction(400, none, none, none, "D9EE", {}, {cpu8086,cpuFPU});
EndMnemonic(opFLDZ, 400);
StartMnemonic(opFMUL, "FMUL", 401);
AddInstruction(401, mem32, none, none, "D8/1", {}, {cpu8086,cpuFPU});
AddInstruction(402, mem64, none, none, "DC/1", {}, {cpu8086,cpuFPU});
AddInstruction(403, st0, sti, none, "D8C8+i", {}, {cpu8086,cpuFPU});
AddInstruction(404, sti, st0, none, "DCC8+i", {}, {cpu8086,cpuFPU});
EndMnemonic(opFMUL, 404);
StartMnemonic(opFMULP, "FMULP", 405);
AddInstruction(405, none, none, none, "DEC9", {}, {cpu8086,cpuFPU});
AddInstruction(406, sti, st0, none, "DEC8+i", {}, {cpu8086,cpuFPU});
EndMnemonic(opFMULP, 406);
StartMnemonic(opFNCLEX, "FNCLEX", 407);
AddInstruction(407, none, none, none, "DBE2", {}, {cpu8086,cpuFPU});
EndMnemonic(opFNCLEX, 407);
StartMnemonic(opFNINIT, "FNINIT", 408);
AddInstruction(408, none, none, none, "DBE3", {}, {cpu8086,cpuFPU});
EndMnemonic(opFNINIT, 408);
StartMnemonic(opFNOP, "FNOP", 409);
AddInstruction(409, none, none, none, "D9D0", {}, {cpu8086,cpuFPU});
EndMnemonic(opFNOP, 409);
StartMnemonic(opFNSAVE, "FNSAVE", 410);
AddInstruction(410, mem, none, none, "DD/6", {}, {cpu8086,cpuFPU});
AddInstruction(411, mem, none, none, "DD/6", {}, {cpu8086,cpuFPU});
EndMnemonic(opFNSAVE, 411);
StartMnemonic(opFNSTCW, "FNSTCW", 412);
AddInstruction(412, mem16, none, none, "D9/7", {}, {cpu8086,cpuFPU});
EndMnemonic(opFNSTCW, 412);
StartMnemonic(opFNSTENV, "FNSTENV", 413);
AddInstruction(413, mem, none, none, "D9/6", {}, {cpu8086,cpuFPU});
EndMnemonic(opFNSTENV, 413);
StartMnemonic(opFNSTSW, "FNSTSW", 414);
AddInstruction(414, AX, none, none, "DFE0", {}, {cpu286,cpuFPU});
AddInstruction(415, mem16, none, none, "DD/7", {}, {cpu8086,cpuFPU});
EndMnemonic(opFNSTSW, 415);
StartMnemonic(opFPATAN, "FPATAN", 416);
AddInstruction(416, none, none, none, "D9F3", {}, {cpu8086,cpuFPU});
EndMnemonic(opFPATAN, 416);
StartMnemonic(opFPREM, "FPREM", 417);
AddInstruction(417, none, none, none, "D9F8", {}, {cpu8086,cpuFPU});
EndMnemonic(opFPREM, 417);
StartMnemonic(opFPREM1, "FPREM1", 418);
AddInstruction(418, none, none, none, "D9F5", {}, {cpu386,cpuFPU});
EndMnemonic(opFPREM1, 418);
StartMnemonic(opFPTAN, "FPTAN", 419);
AddInstruction(419, none, none, none, "D9F2", {}, {cpu8086,cpuFPU});
EndMnemonic(opFPTAN, 419);
StartMnemonic(opFRNDINT, "FRNDINT", 420);
AddInstruction(420, none, none, none, "D9FC", {}, {cpu8086,cpuFPU});
EndMnemonic(opFRNDINT, 420);
StartMnemonic(opFRSTOR, "FRSTOR", 421);
AddInstruction(421, mem, none, none, "DD/4", {}, {cpu8086,cpuFPU});
AddInstruction(422, mem, none, none, "DD/4", {}, {cpu8086,cpuFPU});
EndMnemonic(opFRSTOR, 422);
StartMnemonic(opFSAVE, "FSAVE", 423);
AddInstruction(423, mem, none, none, "9BDD/6", {}, {cpu8086,cpuFPU});
AddInstruction(424, mem, none, none, "9BDD/6", {}, {cpu8086,cpuFPU});
EndMnemonic(opFSAVE, 424);
StartMnemonic(opFSCALE, "FSCALE", 425);
AddInstruction(425, none, none, none, "D9FD", {}, {cpu8086,cpuFPU});
EndMnemonic(opFSCALE, 425);
StartMnemonic(opFSIN, "FSIN", 426);
AddInstruction(426, none, none, none, "D9FE", {}, {cpu386,cpuFPU});
EndMnemonic(opFSIN, 426);
StartMnemonic(opFSINCOS, "FSINCOS", 427);
AddInstruction(427, none, none, none, "D9FB", {}, {cpu386,cpuFPU});
EndMnemonic(opFSINCOS, 427);
StartMnemonic(opFSQRT, "FSQRT", 428);
AddInstruction(428, none, none, none, "D9FA", {}, {cpu8086,cpuFPU});
EndMnemonic(opFSQRT, 428);
StartMnemonic(opFST, "FST", 429);
AddInstruction(429, sti, none, none, "DDD0+i", {}, {cpu8086,cpuFPU});
AddInstruction(430, mem32, none, none, "D9/2", {}, {cpu8086,cpuFPU});
AddInstruction(431, mem64, none, none, "DD/2", {}, {cpu8086,cpuFPU});
EndMnemonic(opFST, 431);
StartMnemonic(opFSTCW, "FSTCW", 432);
AddInstruction(432, mem16, none, none, "9BD9/7", {}, {cpu8086,cpuFPU});
EndMnemonic(opFSTCW, 432);
StartMnemonic(opFSTENV, "FSTENV", 433);
AddInstruction(433, mem, none, none, "9BD9/6", {}, {cpu8086,cpuFPU});
EndMnemonic(opFSTENV, 433);
StartMnemonic(opFSTP, "FSTP", 434);
AddInstruction(434, sti, none, none, "DDD8+i", {}, {cpu8086,cpuFPU});
AddInstruction(435, mem32, none, none, "D9/3", {}, {cpu8086,cpuFPU});
AddInstruction(436, mem64, none, none, "DD/3", {}, {cpu8086,cpuFPU});
AddInstruction(437, mem, none, none, "DB/7", {}, {cpu8086,cpuFPU});
EndMnemonic(opFSTP, 437);
StartMnemonic(opFSTSW, "FSTSW", 438);
AddInstruction(438, AX, none, none, "9BDFE0", {}, {cpu286,cpuFPU});
AddInstruction(439, mem16, none, none, "9BDD/7", {}, {cpu8086,cpuFPU});
EndMnemonic(opFSTSW, 439);
StartMnemonic(opFSUB, "FSUB", 440);
AddInstruction(440, mem32, none, none, "D8/4", {}, {cpu8086,cpuFPU});
AddInstruction(441, mem64, none, none, "DC/4", {}, {cpu8086,cpuFPU});
AddInstruction(442, st0, sti, none, "D8E0+i", {}, {cpu8086,cpuFPU});
AddInstruction(443, sti, st0, none, "DCE8+i", {}, {cpu8086,cpuFPU});
EndMnemonic(opFSUB, 443);
StartMnemonic(opFSUBP, "FSUBP", 444);
AddInstruction(444, none, none, none, "DEE9", {}, {cpu8086,cpuFPU});
AddInstruction(445, sti, st0, none, "DEE8+i", {}, {cpu8086,cpuFPU});
EndMnemonic(opFSUBP, 445);
StartMnemonic(opFSUBR, "FSUBR", 446);
AddInstruction(446, mem32, none, none, "D8/5", {}, {cpu8086,cpuFPU});
AddInstruction(447, mem64, none, none, "DC/5", {}, {cpu8086,cpuFPU});
AddInstruction(448, st0, sti, none, "D8E8+i", {}, {cpu8086,cpuFPU});
AddInstruction(449, sti, st0, none, "DCE0+i", {}, {cpu8086,cpuFPU});
EndMnemonic(opFSUBR, 449);
StartMnemonic(opFSUBRP, "FSUBRP", 450);
AddInstruction(450, none, none, none, "DEE1", {}, {cpu8086,cpuFPU});
AddInstruction(451, sti, st0, none, "DEE0+i", {}, {cpu8086,cpuFPU});
EndMnemonic(opFSUBRP, 451);
StartMnemonic(opFTST, "FTST", 452);
AddInstruction(452, none, none, none, "D9E4", {}, {cpu8086,cpuFPU});
EndMnemonic(opFTST, 452);
StartMnemonic(opFUCOM, "FUCOM", 453);
AddInstruction(453, none, none, none, "DDE1", {}, {cpu386,cpuFPU});
AddInstruction(454, sti, none, none, "DDE0+i", {}, {cpu386,cpuFPU});
EndMnemonic(opFUCOM, 454);
StartMnemonic(opFUCOMI, "FUCOMI", 455);
AddInstruction(455, st0, sti, none, "DBE8+i", {}, {cpuP6,cpuFPU});
EndMnemonic(opFUCOMI, 455);
StartMnemonic(opFUCOMIP, "FUCOMIP", 456);
AddInstruction(456, st0, sti, none, "DFE8+i", {}, {cpuP6,cpuFPU});
EndMnemonic(opFUCOMIP, 456);
StartMnemonic(opFUCOMP, "FUCOMP", 457);
AddInstruction(457, none, none, none, "DDE9", {}, {cpu386,cpuFPU});
AddInstruction(458, sti, none, none, "DDE8+i", {}, {cpu386,cpuFPU});
EndMnemonic(opFUCOMP, 458);
StartMnemonic(opFUCOMPP, "FUCOMPP", 459);
AddInstruction(459, none, none, none, "DAE9", {}, {cpu386,cpuFPU});
EndMnemonic(opFUCOMPP, 459);
StartMnemonic(opFWAIT, "FWAIT", 460);
AddInstruction(460, none, none, none, "9B", {}, {cpu8086});
EndMnemonic(opFWAIT, 460);
StartMnemonic(opFXAM, "FXAM", 461);
AddInstruction(461, none, none, none, "D9E5", {}, {cpu8086,cpuFPU});
EndMnemonic(opFXAM, 461);
StartMnemonic(opFXCH, "FXCH", 462);
AddInstruction(462, none, none, none, "D9C9", {}, {cpu8086,cpuFPU});
AddInstruction(463, sti, none, none, "D9C8+i", {}, {cpu8086,cpuFPU});
EndMnemonic(opFXCH, 463);
StartMnemonic(opFXRSTOR, "FXRSTOR", 464);
AddInstruction(464, mem, none, none, "0FAE/1", {}, {cpuP6,cpuSSE,cpuFPU});
AddInstruction(465, mem, none, none, "0FAE/1", {}, {cpuP6,cpuSSE,cpuFPU});
AddInstruction(466, mem, none, none, "0FAE/1", {}, {cpuP6,cpuSSE,cpuFPU});
EndMnemonic(opFXRSTOR, 466);
StartMnemonic(opFXSAVE, "FXSAVE", 467);
AddInstruction(467, mem, none, none, "0FAE/0", {}, {cpuP6,cpuSSE,cpuFPU});
AddInstruction(468, mem, none, none, "0FAE/0", {}, {cpuP6,cpuSSE,cpuFPU});
AddInstruction(469, mem, none, none, "0FAE/0", {}, {cpuP6,cpuSSE,cpuFPU});
EndMnemonic(opFXSAVE, 469);
StartMnemonic(opFXTRACT, "FXTRACT", 470);
AddInstruction(470, none, none, none, "D9F4", {}, {cpu8086,cpuFPU});
EndMnemonic(opFXTRACT, 470);
StartMnemonic(opFYL2X, "FYL2X", 471);
AddInstruction(471, none, none, none, "D9F1", {}, {cpu8086,cpuFPU});
EndMnemonic(opFYL2X, 471);
StartMnemonic(opFYL2XP1, "FYL2XP1", 472);
AddInstruction(472, none, none, none, "D9F9", {}, {cpu8086,cpuFPU});
EndMnemonic(opFYL2XP1, 472);
StartMnemonic(opHADDPD, "HADDPD", 473);
AddInstruction(473, xmm, xmmmem128, none, "660F7C/r", {}, {cpuSSE3});
EndMnemonic(opHADDPD, 473);
StartMnemonic(opHADDPS, "HADDPS", 474);
AddInstruction(474, xmm, xmmmem128, none, "F20F7C/r", {}, {cpuSSE3});
EndMnemonic(opHADDPS, 474);
StartMnemonic(opHLT, "HLT", 475);
AddInstruction(475, none, none, none, "F4", {}, {cpu8086,cpuPrivileged});
EndMnemonic(opHLT, 475);
StartMnemonic(opHSUBPD, "HSUBPD", 476);
AddInstruction(476, xmm, xmmmem128, none, "660F7D/r", {}, {cpuSSE3});
EndMnemonic(opHSUBPD, 476);
StartMnemonic(opHSUBPS, "HSUBPS", 477);
AddInstruction(477, xmm, xmmmem128, none, "F20F7D/r", {}, {cpuSSE3});
EndMnemonic(opHSUBPS, 477);
StartMnemonic(opIDIV, "IDIV", 478);
AddInstruction(478, regmem8, none, none, "F6/7", {}, {cpu8086});
AddInstruction(479, regmem16, none, none, "F7/7", {optO16}, {cpu8086});
AddInstruction(480, regmem32, none, none, "F7/7", {optO32}, {cpu386});
AddInstruction(481, regmem64, none, none, "F7/7", {}, {cpuAMD64});
EndMnemonic(opIDIV, 481);
StartMnemonic(opIMUL, "IMUL", 482);
AddInstruction(482, regmem8, none, none, "F6/5", {}, {cpu8086});
AddInstruction(483, regmem16, none, none, "F7/5", {optO16}, {cpu8086});
AddInstruction(484, regmem32, none, none, "F7/5", {optO32}, {cpu386});
AddInstruction(485, regmem64, none, none, "F7/5", {}, {cpuAMD64});
AddInstruction(486, reg16, regmem16, none, "0FAF/r", {optO16}, {cpu386});
AddInstruction(487, reg32, regmem32, none, "0FAF/r", {optO32}, {cpu386});
AddInstruction(488, reg64, regmem64, none, "0FAF/r", {}, {cpuAMD64});
AddInstruction(489, reg16, regmem16, simm8, "6B/rib", {optO16}, {cpu186});
AddInstruction(490, reg32, regmem32, simm8, "6B/rib", {optO32}, {cpu386});
AddInstruction(491, reg64, regmem64, simm8, "6B/rib", {}, {cpuAMD64});
AddInstruction(492, reg16, regmem16, simm16, "69/riw", {optO16}, {cpu186});
AddInstruction(493, reg32, regmem32, simm32, "69/rid", {optO32}, {cpu386});
AddInstruction(494, reg64, regmem64, simm32, "69/rid", {}, {cpuAMD64});
EndMnemonic(opIMUL, 494);
StartMnemonic(opIN, "IN", 495);
AddInstruction(495, AL, uimm8, none, "E4ib", {}, {cpu8086});
AddInstruction(496, AX, uimm8, none, "E5ib", {optO16}, {cpu8086});
AddInstruction(497, EAX, uimm8, none, "E5ib", {optO32}, {cpu386});
AddInstruction(498, AL, DX, none, "EC", {}, {cpu8086});
AddInstruction(499, AX, DX, none, "ED", {optO16}, {cpu8086});
AddInstruction(500, EAX, DX, none, "ED", {optO32}, {cpu386});
EndMnemonic(opIN, 500);
StartMnemonic(opINC, "INC", 501);
AddInstruction(501, reg16, none, none, "40rw", {optO16}, {cpu8086});
AddInstruction(502, reg32, none, none, "40rd", {optO32}, {cpu386});
AddInstruction(503, regmem8, none, none, "FE/0", {}, {cpu8086});
AddInstruction(504, regmem16, none, none, "FF/0", {optO16}, {cpu8086});
AddInstruction(505, regmem32, none, none, "FF/0", {optO32}, {cpu386});
AddInstruction(506, regmem64, none, none, "FF/0", {}, {cpuAMD64});
EndMnemonic(opINC, 506);
StartMnemonic(opINS, "INS", 507);
AddInstruction(507, mem8, DX, none, "6C", {}, {cpu186});
AddInstruction(508, mem16, DX, none, "6D", {optO16}, {cpu186});
AddInstruction(509, mem32, DX, none, "6D", {optO32}, {cpu386});
EndMnemonic(opINS, 509);
StartMnemonic(opINSB, "INSB", 510);
AddInstruction(510, none, none, none, "6C", {}, {cpu186});
EndMnemonic(opINSB, 510);
StartMnemonic(opINSD, "INSD", 511);
AddInstruction(511, none, none, none, "6D", {optO32}, {cpu386});
EndMnemonic(opINSD, 511);
StartMnemonic(opINSW, "INSW", 512);
AddInstruction(512, none, none, none, "6D", {optO16}, {cpu186});
EndMnemonic(opINSW, 512);
StartMnemonic(opINT, "INT", 513);
AddInstruction(513, uimm8, none, none, "CDib", {}, {cpu8086});
EndMnemonic(opINT, 513);
StartMnemonic(opINT3, "INT3", 514);
AddInstruction(514, none, none, none, "CC", {}, {cpu8086});
EndMnemonic(opINT3, 514);
StartMnemonic(opINTO, "INTO", 515);
AddInstruction(515, none, none, none, "CE", {optNot64}, {cpu8086});
EndMnemonic(opINTO, 515);
StartMnemonic(opINVD, "INVD", 516);
AddInstruction(516, none, none, none, "0F08", {}, {cpu486,cpuPrivileged});
EndMnemonic(opINVD, 516);
StartMnemonic(opINVLPG, "INVLPG", 517);
AddInstruction(517, mem8, none, none, "0F01/7", {}, {cpu486});
EndMnemonic(opINVLPG, 517);
StartMnemonic(opINVLPGA, "INVLPGA", 518);
AddInstruction(518, rAX, ECX, none, "0F01DF", {}, {cpu386});
EndMnemonic(opINVLPGA, 518);
StartMnemonic(opIRET, "IRET", 519);
AddInstruction(519, none, none, none, "CF", {optO16}, {cpu8086});
EndMnemonic(opIRET, 519);
StartMnemonic(opIRETD, "IRETD", 520);
AddInstruction(520, none, none, none, "CF", {optO32}, {cpu386});
EndMnemonic(opIRETD, 520);
StartMnemonic(opIRETQ, "IRETQ", 521);
AddInstruction(521, none, none, none, "CF", {optO64}, {cpuAMD64});
EndMnemonic(opIRETQ, 521);
StartMnemonic(opJA, "JA", 522);
AddInstruction(522, rel8off, none, none, "77cb", {}, {cpu8086});
AddInstruction(523, rel16off, none, none, "0F87cw", {optO16}, {cpu386});
AddInstruction(524, rel32off, none, none, "0F87cd", {optO32}, {cpu386});
EndMnemonic(opJA, 524);
StartMnemonic(opJAE, "JAE", 525);
AddInstruction(525, rel8off, none, none, "73cb", {}, {cpu8086});
AddInstruction(526, rel16off, none, none, "0F83cw", {optO16}, {cpu386});
AddInstruction(527, rel32off, none, none, "0F83cd", {optO32}, {cpu386});
EndMnemonic(opJAE, 527);
StartMnemonic(opJB, "JB", 528);
AddInstruction(528, rel8off, none, none, "72cb", {}, {cpu8086});
AddInstruction(529, rel16off, none, none, "0F82cw", {optO16}, {cpu386});
AddInstruction(530, rel32off, none, none, "0F82cd", {optO32}, {cpu386});
EndMnemonic(opJB, 530);
StartMnemonic(opJBE, "JBE", 531);
AddInstruction(531, rel8off, none, none, "76cb", {}, {cpu8086});
AddInstruction(532, rel16off, none, none, "0F86cw", {optO16}, {cpu386});
AddInstruction(533, rel32off, none, none, "0F86cd", {optO32}, {cpu386});
EndMnemonic(opJBE, 533);
StartMnemonic(opJC, "JC", 534);
AddInstruction(534, rel8off, none, none, "72cb", {}, {cpu8086});
AddInstruction(535, rel16off, none, none, "0F82cw", {optO16}, {cpu386});
AddInstruction(536, rel32off, none, none, "0F82cd", {optO32}, {cpu386});
EndMnemonic(opJC, 536);
StartMnemonic(opJCXZ, "JCXZ", 537);
AddInstruction(537, rel8off, none, none, "E3cb", {optA16}, {cpu8086});
EndMnemonic(opJCXZ, 537);
StartMnemonic(opJE, "JE", 538);
AddInstruction(538, rel8off, none, none, "74cb", {}, {cpu8086});
AddInstruction(539, rel16off, none, none, "0F84cw", {optO16}, {cpu386});
AddInstruction(540, rel32off, none, none, "0F84cd", {optO32}, {cpu386});
EndMnemonic(opJE, 540);
StartMnemonic(opJECXZ, "JECXZ", 541);
AddInstruction(541, rel8off, none, none, "E3cb", {optA32}, {cpu386});
EndMnemonic(opJECXZ, 541);
StartMnemonic(opJG, "JG", 542);
AddInstruction(542, rel8off, none, none, "7Fcb", {}, {cpu8086});
AddInstruction(543, rel16off, none, none, "0F8Fcw", {optO16}, {cpu386});
AddInstruction(544, rel32off, none, none, "0F8Fcd", {optO32}, {cpu386});
EndMnemonic(opJG, 544);
StartMnemonic(opJGE, "JGE", 545);
AddInstruction(545, rel8off, none, none, "7Dcb", {}, {cpu8086});
AddInstruction(546, rel16off, none, none, "0F8Dcw", {optO16}, {cpu386});
AddInstruction(547, rel32off, none, none, "0F8Dcd", {optO32}, {cpu386});
EndMnemonic(opJGE, 547);
StartMnemonic(opJL, "JL", 548);
AddInstruction(548, rel8off, none, none, "7Ccb", {}, {cpu8086});
AddInstruction(549, rel16off, none, none, "0F8Ccw", {optO16}, {cpu386});
AddInstruction(550, rel32off, none, none, "0F8Ccd", {optO32}, {cpu386});
EndMnemonic(opJL, 550);
StartMnemonic(opJLE, "JLE", 551);
AddInstruction(551, rel8off, none, none, "7Ecb", {}, {cpu8086});
AddInstruction(552, rel16off, none, none, "0F8Ecw", {optO16}, {cpu386});
AddInstruction(553, rel32off, none, none, "0F8Ecd", {optO32}, {cpu386});
EndMnemonic(opJLE, 553);
StartMnemonic(opJMP, "JMP", 554);
AddInstruction(554, rel8off, none, none, "EBcb", {}, {cpu8086});
AddInstruction(555, rel16off, none, none, "E9cw", {optO16}, {cpu8086});
AddInstruction(556, rel32off, none, none, "E9cd", {optO32}, {cpu8086});
AddInstruction(557, regmem16, none, none, "FF/4", {optO16}, {cpu8086});
AddInstruction(558, regmem32, none, none, "FF/4", {optO32}, {cpu386});
AddInstruction(559, regmem64, none, none, "FF/4", {}, {cpuAMD64});
EndMnemonic(opJMP, 559);
StartMnemonic(opJMPFAR, "JMPFAR", 560);
AddInstruction(560, pntr1616, none, none, "EAcd", {optO16,optNot64}, {cpu8086});
AddInstruction(561, pntr1632, none, none, "EAcp", {optO32,optNot64}, {cpu386});
AddInstruction(562, mem, none, none, "FF/5", {optO16}, {cpu8086});
AddInstruction(563, mem, none, none, "FF/5", {optO32}, {cpu386});
EndMnemonic(opJMPFAR, 563);
StartMnemonic(opJNA, "JNA", 564);
AddInstruction(564, rel8off, none, none, "76cb", {}, {cpu8086});
AddInstruction(565, rel16off, none, none, "0F86cw", {optO16}, {cpu386});
AddInstruction(566, rel32off, none, none, "0F86cd", {optO32}, {cpu386});
EndMnemonic(opJNA, 566);
StartMnemonic(opJNAE, "JNAE", 567);
AddInstruction(567, rel8off, none, none, "72cb", {}, {cpu8086});
AddInstruction(568, rel16off, none, none, "0F82cw", {optO16}, {cpu386});
AddInstruction(569, rel32off, none, none, "0F82cd", {optO32}, {cpu386});
EndMnemonic(opJNAE, 569);
StartMnemonic(opJNB, "JNB", 570);
AddInstruction(570, rel8off, none, none, "73cb", {}, {cpu8086});
AddInstruction(571, rel16off, none, none, "0F83cw", {optO16}, {cpu386});
AddInstruction(572, rel32off, none, none, "0F83cd", {optO32}, {cpu386});
EndMnemonic(opJNB, 572);
StartMnemonic(opJNBE, "JNBE", 573);
AddInstruction(573, rel8off, none, none, "77cb", {}, {cpu8086});
AddInstruction(574, rel16off, none, none, "0F87cw", {optO16}, {cpu386});
AddInstruction(575, rel32off, none, none, "0F87cd", {optO32}, {cpu386});
EndMnemonic(opJNBE, 575);
StartMnemonic(opJNC, "JNC", 576);
AddInstruction(576, rel8off, none, none, "73cb", {}, {cpu8086});
AddInstruction(577, rel16off, none, none, "0F83cw", {optO16}, {cpu386});
AddInstruction(578, rel32off, none, none, "0F83cd", {optO32}, {cpu386});
EndMnemonic(opJNC, 578);
StartMnemonic(opJNE, "JNE", 579);
AddInstruction(579, rel8off, none, none, "75cb", {}, {cpu8086});
AddInstruction(580, rel16off, none, none, "0F85cw", {optO16}, {cpu386});
AddInstruction(581, rel32off, none, none, "0F85cd", {optO32}, {cpu386});
EndMnemonic(opJNE, 581);
StartMnemonic(opJNG, "JNG", 582);
AddInstruction(582, rel8off, none, none, "7Ecb", {}, {cpu8086});
AddInstruction(583, rel16off, none, none, "0F8Ecw", {optO16}, {cpu386});
AddInstruction(584, rel32off, none, none, "0F8Ecd", {optO32}, {cpu386});
EndMnemonic(opJNG, 584);
StartMnemonic(opJNGE, "JNGE", 585);
AddInstruction(585, rel8off, none, none, "7Ccb", {}, {cpu8086});
AddInstruction(586, rel16off, none, none, "0F8Ccw", {optO16}, {cpu386});
AddInstruction(587, rel32off, none, none, "0F8Ccd", {optO32}, {cpu386});
EndMnemonic(opJNGE, 587);
StartMnemonic(opJNL, "JNL", 588);
AddInstruction(588, rel8off, none, none, "7Dcb", {}, {cpu8086});
AddInstruction(589, rel16off, none, none, "0F8Dcw", {optO16}, {cpu386});
AddInstruction(590, rel32off, none, none, "0F8Dcd", {optO32}, {cpu386});
EndMnemonic(opJNL, 590);
StartMnemonic(opJNLE, "JNLE", 591);
AddInstruction(591, rel8off, none, none, "7Fcb", {}, {cpu8086});
AddInstruction(592, rel16off, none, none, "0F8Fcw", {optO16}, {cpu386});
AddInstruction(593, rel32off, none, none, "0F8Fcd", {optO32}, {cpu386});
EndMnemonic(opJNLE, 593);
StartMnemonic(opJNO, "JNO", 594);
AddInstruction(594, rel8off, none, none, "71cb", {}, {cpu8086});
AddInstruction(595, rel16off, none, none, "0F81cw", {optO16}, {cpu386});
AddInstruction(596, rel32off, none, none, "0F81cd", {optO32}, {cpu386});
EndMnemonic(opJNO, 596);
StartMnemonic(opJNP, "JNP", 597);
AddInstruction(597, rel8off, none, none, "7Bcb", {}, {cpu8086});
AddInstruction(598, rel16off, none, none, "0F8Bcw", {optO16}, {cpu386});
AddInstruction(599, rel32off, none, none, "0F8Bcd", {optO32}, {cpu386});
EndMnemonic(opJNP, 599);
StartMnemonic(opJNS, "JNS", 600);
AddInstruction(600, rel8off, none, none, "79cb", {}, {cpu8086});
AddInstruction(601, rel16off, none, none, "0F89cw", {optO16}, {cpu386});
AddInstruction(602, rel32off, none, none, "0F89cd", {optO32}, {cpu386});
EndMnemonic(opJNS, 602);
StartMnemonic(opJNZ, "JNZ", 603);
AddInstruction(603, rel8off, none, none, "75cb", {}, {cpu8086});
AddInstruction(604, rel16off, none, none, "0F85cw", {optO16}, {cpu386});
AddInstruction(605, rel32off, none, none, "0F85cd", {optO32}, {cpu386});
EndMnemonic(opJNZ, 605);
StartMnemonic(opJO, "JO", 606);
AddInstruction(606, rel8off, none, none, "70cb", {}, {cpu8086});
AddInstruction(607, rel16off, none, none, "0F80cw", {optO16}, {cpu386});
AddInstruction(608, rel32off, none, none, "0F80cd", {optO32}, {cpu386});
EndMnemonic(opJO, 608);
StartMnemonic(opJP, "JP", 609);
AddInstruction(609, rel8off, none, none, "7Acb", {}, {cpu8086});
AddInstruction(610, rel16off, none, none, "0F8Acw", {optO16}, {cpu386});
AddInstruction(611, rel32off, none, none, "0F8Acd", {optO32}, {cpu386});
EndMnemonic(opJP, 611);
StartMnemonic(opJPE, "JPE", 612);
AddInstruction(612, rel8off, none, none, "7Acb", {}, {cpu8086});
AddInstruction(613, rel16off, none, none, "0F8Acw", {optO16}, {cpu386});
AddInstruction(614, rel32off, none, none, "0F8Acd", {optO32}, {cpu386});
EndMnemonic(opJPE, 614);
StartMnemonic(opJPO, "JPO", 615);
AddInstruction(615, rel8off, none, none, "7Bcb", {}, {cpu8086});
AddInstruction(616, rel16off, none, none, "0F8Bcw", {optO16}, {cpu386});
AddInstruction(617, rel32off, none, none, "0F8Bcd", {optO32}, {cpu386});
EndMnemonic(opJPO, 617);
StartMnemonic(opJRCXZ, "JRCXZ", 618);
AddInstruction(618, rel8off, none, none, "E3cb", {}, {cpuAMD64});
EndMnemonic(opJRCXZ, 618);
StartMnemonic(opJS, "JS", 619);
AddInstruction(619, rel8off, none, none, "78cb", {}, {cpu8086});
AddInstruction(620, rel16off, none, none, "0F88cw", {optO16}, {cpu386});
AddInstruction(621, rel32off, none, none, "0F88cd", {optO32}, {cpu386});
EndMnemonic(opJS, 621);
StartMnemonic(opJZ, "JZ", 622);
AddInstruction(622, rel8off, none, none, "74cb", {}, {cpu8086});
AddInstruction(623, rel16off, none, none, "0F84cw", {optO16}, {cpu386});
AddInstruction(624, rel32off, none, none, "0F84cd", {optO32}, {cpu386});
EndMnemonic(opJZ, 624);
StartMnemonic(opLAHF, "LAHF", 625);
AddInstruction(625, none, none, none, "9F", {}, {cpu8086});
EndMnemonic(opLAHF, 625);
StartMnemonic(opLAR, "LAR", 626);
AddInstruction(626, reg16, regmem16, none, "0F02/r", {optO16}, {cpu286,cpuPrivileged});
AddInstruction(627, reg32, regmem16, none, "0F02/r", {optO32}, {cpu286,cpuPrivileged});
AddInstruction(628, reg64, regmem16, none, "0F02/r", {}, {cpuAMD64,cpuPrivileged});
EndMnemonic(opLAR, 628);
StartMnemonic(opLDDQU, "LDDQU", 629);
AddInstruction(629, xmm, mem128, none, "F20FF0/r", {}, {cpuSSE3});
EndMnemonic(opLDDQU, 629);
StartMnemonic(opLDMXCSR, "LDMXCSR", 630);
AddInstruction(630, mem32, none, none, "0FAE/2", {}, {cpuSSE});
EndMnemonic(opLDMXCSR, 630);
StartMnemonic(opLDS, "LDS", 631);
AddInstruction(631, reg16, mem, none, "C5/r", {optO16,optNot64}, {cpu8086});
AddInstruction(632, reg32, mem, none, "C5/r", {optO32,optNot64}, {cpu386});
EndMnemonic(opLDS, 632);
StartMnemonic(opLEA, "LEA", 633);
AddInstruction(633, reg16, mem, none, "8D/r", {optO16}, {cpu8086});
AddInstruction(634, reg32, mem, none, "8D/r", {optO32}, {cpu386});
AddInstruction(635, reg64, mem, none, "8D/r", {}, {cpuAMD64});
EndMnemonic(opLEA, 635);
StartMnemonic(opLEAVE, "LEAVE", 636);
AddInstruction(636, none, none, none, "C9", {}, {cpu186});
EndMnemonic(opLEAVE, 636);
StartMnemonic(opLES, "LES", 637);
AddInstruction(637, reg16, mem, none, "C4/r", {optO16,optNot64}, {cpu8086});
AddInstruction(638, reg32, mem, none, "C4/r", {optO32,optNot64}, {cpu386});
EndMnemonic(opLES, 638);
StartMnemonic(opLFENCE, "LFENCE", 639);
AddInstruction(639, none, none, none, "0FAEE8", {}, {cpuSSE2});
EndMnemonic(opLFENCE, 639);
StartMnemonic(opLFS, "LFS", 640);
AddInstruction(640, reg16, mem, none, "0FB4/r", {optO16}, {cpu386});
AddInstruction(641, reg32, mem, none, "0FB4/r", {optO32}, {cpu386});
EndMnemonic(opLFS, 641);
StartMnemonic(opLGDT, "LGDT", 642);
AddInstruction(642, mem, none, none, "0F01/2", {}, {cpu286,cpuPrivileged});
AddInstruction(643, mem, none, none, "0F01/2", {}, {cpuAMD64,cpuPrivileged});
EndMnemonic(opLGDT, 643);
StartMnemonic(opLGS, "LGS", 644);
AddInstruction(644, reg16, mem, none, "0FB5/r", {optO16}, {cpu386});
AddInstruction(645, reg32, mem, none, "0FB5/r", {optO32}, {cpu386});
EndMnemonic(opLGS, 645);
StartMnemonic(opLIDT, "LIDT", 646);
AddInstruction(646, mem, none, none, "0F01/3", {}, {cpu286,cpuPrivileged});
AddInstruction(647, mem, none, none, "0F01/3", {}, {cpuAMD64,cpuPrivileged});
EndMnemonic(opLIDT, 647);
StartMnemonic(opLLDT, "LLDT", 648);
AddInstruction(648, regmem16, none, none, "0F00/2", {}, {cpu286,cpuPrivileged});
EndMnemonic(opLLDT, 648);
StartMnemonic(opLMSW, "LMSW", 649);
AddInstruction(649, regmem16, none, none, "0F01/6", {}, {cpu286,cpuPrivileged});
EndMnemonic(opLMSW, 649);
StartMnemonic(opLODS, "LODS", 650);
AddInstruction(650, mem8, none, none, "AC", {}, {cpu8086});
AddInstruction(651, mem16, none, none, "AD", {optO16}, {cpu8086});
AddInstruction(652, mem32, none, none, "AD", {optO32}, {cpu386});
AddInstruction(653, mem64, none, none, "AD", {}, {cpuAMD64});
EndMnemonic(opLODS, 653);
StartMnemonic(opLODSB, "LODSB", 654);
AddInstruction(654, none, none, none, "AC", {}, {cpu8086});
EndMnemonic(opLODSB, 654);
StartMnemonic(opLODSD, "LODSD", 655);
AddInstruction(655, none, none, none, "AD", {optO32}, {cpu386});
EndMnemonic(opLODSD, 655);
StartMnemonic(opLODSQ, "LODSQ", 656);
AddInstruction(656, none, none, none, "AD", {}, {cpuAMD64});
EndMnemonic(opLODSQ, 656);
StartMnemonic(opLODSW, "LODSW", 657);
AddInstruction(657, none, none, none, "AD", {optO16}, {cpu8086});
EndMnemonic(opLODSW, 657);
StartMnemonic(opLOOP, "LOOP", 658);
AddInstruction(658, rel8off, none, none, "E2cb", {}, {cpu8086});
EndMnemonic(opLOOP, 658);
StartMnemonic(opLOOPE, "LOOPE", 659);
AddInstruction(659, rel8off, none, none, "E1cb", {}, {cpu8086});
EndMnemonic(opLOOPE, 659);
StartMnemonic(opLOOPNE, "LOOPNE", 660);
AddInstruction(660, rel8off, none, none, "E0cb", {}, {cpu8086});
EndMnemonic(opLOOPNE, 660);
StartMnemonic(opLOOPNZ, "LOOPNZ", 661);
AddInstruction(661, rel8off, none, none, "E0cb", {}, {cpu8086});
EndMnemonic(opLOOPNZ, 661);
StartMnemonic(opLOOPZ, "LOOPZ", 662);
AddInstruction(662, rel8off, none, none, "E1cb", {}, {cpu8086});
EndMnemonic(opLOOPZ, 662);
StartMnemonic(opLSL, "LSL", 663);
AddInstruction(663, reg16, regmem16, none, "0F03/r", {}, {cpu286,cpuPrivileged});
AddInstruction(664, reg32, regmem16, none, "0F03/r", {}, {cpu286,cpuPrivileged});
AddInstruction(665, reg64, regmem16, none, "0F03/r", {}, {cpuAMD64,cpuPrivileged});
EndMnemonic(opLSL, 665);
StartMnemonic(opLSS, "LSS", 666);
AddInstruction(666, reg16, mem, none, "0FB2/r", {optO16}, {cpu386});
AddInstruction(667, reg32, mem, none, "0FB2/r", {optO32}, {cpu386});
EndMnemonic(opLSS, 667);
StartMnemonic(opLTR, "LTR", 668);
AddInstruction(668, regmem16, none, none, "0F00/3", {}, {cpu286,cpuPrivileged});
EndMnemonic(opLTR, 668);
StartMnemonic(opMASKMOVDQU, "MASKMOVDQU", 669);
AddInstruction(669, xmm, xmm, none, "660FF7/r", {}, {cpuSSE2});
EndMnemonic(opMASKMOVDQU, 669);
StartMnemonic(opMASKMOVQ, "MASKMOVQ", 670);
AddInstruction(670, mmx, mmx, none, "0FF7/r", {}, {cpuMMX});
EndMnemonic(opMASKMOVQ, 670);
StartMnemonic(opMAXPD, "MAXPD", 671);
AddInstruction(671, xmm, xmmmem128, none, "660F5F/r", {}, {cpuSSE2});
EndMnemonic(opMAXPD, 671);
StartMnemonic(opMAXPS, "MAXPS", 672);
AddInstruction(672, xmm, xmmmem128, none, "0F5F/r", {}, {cpuSSE});
EndMnemonic(opMAXPS, 672);
StartMnemonic(opMAXSD, "MAXSD", 673);
AddInstruction(673, xmm, xmmmem64, none, "F20F5F/r", {}, {cpuSSE2});
EndMnemonic(opMAXSD, 673);
StartMnemonic(opMAXSS, "MAXSS", 674);
AddInstruction(674, xmm, xmmmem32, none, "F30F5F/r", {}, {cpuSSE});
EndMnemonic(opMAXSS, 674);
StartMnemonic(opMFENCE, "MFENCE", 675);
AddInstruction(675, none, none, none, "0FAEF0", {}, {cpuSSE2});
EndMnemonic(opMFENCE, 675);
StartMnemonic(opMINPD, "MINPD", 676);
AddInstruction(676, xmm, xmmmem128, none, "660F5D/r", {}, {cpuSSE2});
EndMnemonic(opMINPD, 676);
StartMnemonic(opMINPS, "MINPS", 677);
AddInstruction(677, xmm, xmmmem128, none, "0F5D/r", {}, {cpuSSE});
EndMnemonic(opMINPS, 677);
StartMnemonic(opMINSD, "MINSD", 678);
AddInstruction(678, xmm, xmmmem64, none, "F20F5D/r", {}, {cpuSSE2});
EndMnemonic(opMINSD, 678);
StartMnemonic(opMINSS, "MINSS", 679);
AddInstruction(679, xmm, xmmmem32, none, "F30F5D/r", {}, {cpuSSE});
EndMnemonic(opMINSS, 679);
StartMnemonic(opMOV, "MOV", 680);
AddInstruction(680, regmem8, reg8, none, "88/r", {}, {cpu8086});
AddInstruction(681, regmem16, reg16, none, "89/r", {optO16}, {cpu8086});
AddInstruction(682, regmem32, reg32, none, "89/r", {optO32}, {cpu386});
AddInstruction(683, regmem64, reg64, none, "89/r", {}, {cpuAMD64});
AddInstruction(684, reg8, regmem8, none, "8A/r", {}, {cpu8086});
AddInstruction(685, reg16, regmem16, none, "8B/r", {optO16}, {cpu8086});
AddInstruction(686, reg32, regmem32, none, "8B/r", {optO32}, {cpu386});
AddInstruction(687, reg64, regmem64, none, "8B/r", {}, {cpuAMD64});
AddInstruction(688, reg8, imm8, none, "B0rbib", {}, {cpu8086});
AddInstruction(689, reg16, imm16, none, "B8rwiw", {optO16}, {cpu8086});
AddInstruction(690, reg32, imm32, none, "B8rdid", {optO32}, {cpu386});
AddInstruction(691, reg64, imm64, none, "B8rqiq", {}, {cpuAMD64});
AddInstruction(692, CRn, reg32, none, "0F22/r", {}, {cpu386});
AddInstruction(693, CRn, reg64, none, "0F22/r", {}, {cpuAMD64});
AddInstruction(694, reg32, CRn, none, "0F20/r", {}, {cpu386});
AddInstruction(695, reg64, CRn, none, "0F20/r", {}, {cpuAMD64});
AddInstruction(696, CR8, reg32, none, "F00F22/r", {}, {cpu386});
AddInstruction(697, CR8, reg64, none, "F00F22/r", {}, {cpuAMD64});
AddInstruction(698, reg32, CR8, none, "F00F20/r", {}, {cpu386});
AddInstruction(699, reg64, CR8, none, "F00F20/r", {}, {cpuAMD64});
AddInstruction(700, reg32, DRn, none, "0F21/r", {}, {cpu386});
AddInstruction(701, reg64, DRn, none, "0F21/r", {}, {cpuAMD64});
AddInstruction(702, DRn, reg32, none, "0F23/r", {}, {cpu386});
AddInstruction(703, DRn, reg64, none, "0F23/r", {}, {cpuAMD64});
AddInstruction(704, regmem16, segReg, none, "8C/r", {optO16}, {cpu8086});
AddInstruction(705, regmem32, segReg, none, "8C/r", {optO32}, {cpu386});
AddInstruction(706, regmem64, segReg, none, "8C/r", {}, {cpuAMD64});
AddInstruction(707, segReg, regmem16, none, "8E/r", {optO16}, {cpu8086});
AddInstruction(708, segReg, regmem32, none, "8E/r", {optO32}, {cpu386});
AddInstruction(709, segReg, regmem64, none, "8E/r", {}, {cpuAMD64});
AddInstruction(710, AL, moffset8, none, "A0+o", {}, {cpu8086});
AddInstruction(711, AX, moffset16, none, "A1+o", {optO16}, {cpu8086});
AddInstruction(712, EAX, moffset32, none, "A1+o", {optO32}, {cpu386});
AddInstruction(713, RAX, moffset64, none, "A1+o", {}, {cpuAMD64});
AddInstruction(714, moffset8, AL, none, "A2+o", {}, {cpu8086});
AddInstruction(715, moffset16, AX, none, "A3+o", {optO16}, {cpu8086});
AddInstruction(716, moffset32, EAX, none, "A3+o", {optO32}, {cpu386});
AddInstruction(717, moffset64, RAX, none, "A3+o", {}, {cpuAMD64});
AddInstruction(718, regmem8, imm8, none, "C6/0ib", {}, {cpu8086});
AddInstruction(719, regmem16, imm16, none, "C7/0iw", {optO16}, {cpu8086});
AddInstruction(720, regmem32, imm32, none, "C7/0id", {optO32}, {cpu386});
AddInstruction(721, regmem64, imm32, none, "C7/0id", {}, {cpuAMD64});
EndMnemonic(opMOV, 721);
StartMnemonic(opMOVAPD, "MOVAPD", 722);
AddInstruction(722, xmm, xmmmem128, none, "660F28/r", {}, {cpuSSE2});
AddInstruction(723, xmmmem128, xmm, none, "660F29/r", {}, {cpuSSE2});
EndMnemonic(opMOVAPD, 723);
StartMnemonic(opMOVAPS, "MOVAPS", 724);
AddInstruction(724, xmm, xmmmem128, none, "0F28/r", {}, {cpuSSE});
AddInstruction(725, xmmmem128, xmm, none, "0F29/r", {}, {cpuSSE});
EndMnemonic(opMOVAPS, 725);
StartMnemonic(opMOVD, "MOVD", 726);
AddInstruction(726, xmm, regmem32, none, "660F6E/r", {}, {cpuSSE2});
AddInstruction(727, xmm, regmem64, none, "660F6E/r", {}, {cpuAMD64,cpuSSE2});
AddInstruction(728, regmem32, xmm, none, "660F7E/r", {}, {cpuSSE2});
AddInstruction(729, regmem64, xmm, none, "660F7E/r", {}, {cpuAMD64,cpuSSE2});
AddInstruction(730, mmx, regmem32, none, "0F6E/r", {}, {cpuMMX});
AddInstruction(731, mmx, regmem64, none, "0F6E/r", {}, {cpuAMD64,cpuMMX});
AddInstruction(732, regmem32, mmx, none, "0F7E/r", {}, {cpuMMX});
AddInstruction(733, regmem64, mmx, none, "0F7E/r", {}, {cpuAMD64,cpuMMX});
AddInstruction(734, xmm, regmem32, none, "660F6E/r", {}, {cpuSSE2});
AddInstruction(735, xmm, regmem64, none, "660F6E/r", {}, {cpuAMD64,cpuSSE2});
AddInstruction(736, regmem32, xmm, none, "660F7E/r", {}, {cpuSSE2});
AddInstruction(737, regmem64, xmm, none, "660F7E/r", {}, {cpuAMD64,cpuSSE2});
AddInstruction(738, mmx, regmem32, none, "0F6E/r", {}, {cpuMMX});
AddInstruction(739, mmx, regmem64, none, "0F6E/r", {}, {cpuAMD64,cpuMMX});
AddInstruction(740, regmem32, mmx, none, "0F7E/r", {}, {cpuMMX});
AddInstruction(741, regmem64, mmx, none, "0F7E/r", {}, {cpuAMD64,cpuMMX});
EndMnemonic(opMOVD, 741);
StartMnemonic(opMOVDDUP, "MOVDDUP", 742);
AddInstruction(742, xmm, xmmmem64, none, "F20F12/r", {}, {cpuSSE3});
EndMnemonic(opMOVDDUP, 742);
StartMnemonic(opMOVDQ2Q, "MOVDQ2Q", 743);
AddInstruction(743, mmx, xmm, none, "F20FD6/r", {}, {cpuSSE2});
AddInstruction(744, mmx, xmm, none, "F20FD6/r", {}, {cpuSSE2});
EndMnemonic(opMOVDQ2Q, 744);
StartMnemonic(opMOVDQA, "MOVDQA", 745);
AddInstruction(745, xmm, xmmmem128, none, "660F6F/r", {}, {cpuSSE2});
AddInstruction(746, xmmmem128, xmm, none, "660F7F/r", {}, {cpuSSE2});
EndMnemonic(opMOVDQA, 746);
StartMnemonic(opMOVDQU, "MOVDQU", 747);
AddInstruction(747, xmm, xmmmem128, none, "F30F6F/r", {}, {cpuSSE2});
AddInstruction(748, xmmmem128, xmm, none, "F30F7F/r", {}, {cpuSSE2});
EndMnemonic(opMOVDQU, 748);
StartMnemonic(opMOVHLPS, "MOVHLPS", 749);
AddInstruction(749, xmm, xmm, none, "0F12/r", {}, {cpuSSE});
EndMnemonic(opMOVHLPS, 749);
StartMnemonic(opMOVHPD, "MOVHPD", 750);
AddInstruction(750, xmm, mem64, none, "660F16/r", {}, {cpuSSE2});
AddInstruction(751, mem64, xmm, none, "660F17/r", {}, {cpuSSE2});
EndMnemonic(opMOVHPD, 751);
StartMnemonic(opMOVHPS, "MOVHPS", 752);
AddInstruction(752, xmm, mem64, none, "0F16/r", {}, {cpuSSE});
AddInstruction(753, mem64, xmm, none, "0F17/r", {}, {cpuSSE});
EndMnemonic(opMOVHPS, 753);
StartMnemonic(opMOVLHPS, "MOVLHPS", 754);
AddInstruction(754, xmm, xmm, none, "0F16/r", {}, {cpuSSE});
EndMnemonic(opMOVLHPS, 754);
StartMnemonic(opMOVLPD, "MOVLPD", 755);
AddInstruction(755, xmm, mem64, none, "660F12/r", {}, {cpuSSE2});
AddInstruction(756, mem64, xmm, none, "660F13/r", {}, {cpuSSE2});
EndMnemonic(opMOVLPD, 756);
StartMnemonic(opMOVLPS, "MOVLPS", 757);
AddInstruction(757, xmm, mem64, none, "0F12/r", {}, {cpuSSE});
AddInstruction(758, mem64, xmm, none, "0F13/r", {}, {cpuSSE});
EndMnemonic(opMOVLPS, 758);
StartMnemonic(opMOVMSKPD, "MOVMSKPD", 759);
AddInstruction(759, reg32, xmm, none, "660F50/r", {}, {cpuSSE2});
EndMnemonic(opMOVMSKPD, 759);
StartMnemonic(opMOVMSKPS, "MOVMSKPS", 760);
AddInstruction(760, reg32, xmm, none, "0F50/r", {}, {cpuSSE});
AddInstruction(761, reg32, xmm, none, "0F50/r", {}, {cpuSSE});
EndMnemonic(opMOVMSKPS, 761);
StartMnemonic(opMOVNTDQ, "MOVNTDQ", 762);
AddInstruction(762, mem128, xmm, none, "660FE7/r", {}, {cpuSSE2});
EndMnemonic(opMOVNTDQ, 762);
StartMnemonic(opMOVNTI, "MOVNTI", 763);
AddInstruction(763, mem32, reg32, none, "0FC3/r", {}, {cpuSSE2});
AddInstruction(764, mem64, reg64, none, "0FC3/r", {}, {cpuAMD64,cpuSSE2});
EndMnemonic(opMOVNTI, 764);
StartMnemonic(opMOVNTPD, "MOVNTPD", 765);
AddInstruction(765, mem128, xmm, none, "660F2B/r", {}, {cpuSSE2});
EndMnemonic(opMOVNTPD, 765);
StartMnemonic(opMOVNTPS, "MOVNTPS", 766);
AddInstruction(766, mem128, xmm, none, "0F2B/r", {}, {cpuSSE});
EndMnemonic(opMOVNTPS, 766);
StartMnemonic(opMOVNTQ, "MOVNTQ", 767);
AddInstruction(767, mem64, mmx, none, "0FE7/r", {}, {cpuMMX});
EndMnemonic(opMOVNTQ, 767);
StartMnemonic(opMOVQ, "MOVQ", 768);
AddInstruction(768, xmm, xmmmem64, none, "F30F7E/r", {}, {cpuSSE2});
AddInstruction(769, xmmmem64, xmm, none, "660FD6/r", {}, {cpuSSE2});
AddInstruction(770, mmx, mmxmem64, none, "0F6F/r", {}, {cpuMMX});
AddInstruction(771, mmxmem64, mmx, none, "0F7F/r", {}, {cpuMMX});
EndMnemonic(opMOVQ, 771);
StartMnemonic(opMOVQ2DQ, "MOVQ2DQ", 772);
AddInstruction(772, xmm, mmx, none, "F30FD6/r", {}, {cpuSSE2});
AddInstruction(773, xmm, mmx, none, "F30FD6/r", {}, {cpuSSE2});
EndMnemonic(opMOVQ2DQ, 773);
StartMnemonic(opMOVS, "MOVS", 774);
AddInstruction(774, mem8, mem8, none, "A4", {}, {cpu8086});
AddInstruction(775, mem16, mem16, none, "A5", {optO16}, {cpu8086});
AddInstruction(776, mem32, mem32, none, "A5", {optO32}, {cpu386});
AddInstruction(777, mem64, mem64, none, "A5", {}, {cpuAMD64});
EndMnemonic(opMOVS, 777);
StartMnemonic(opMOVSB, "MOVSB", 778);
AddInstruction(778, none, none, none, "A4", {}, {cpu8086});
EndMnemonic(opMOVSB, 778);
StartMnemonic(opMOVSD, "MOVSD", 779);
AddInstruction(779, none, none, none, "A5", {optO32}, {cpu386});
AddInstruction(780, xmm, xmmmem64, none, "F20F10/r", {}, {cpuSSE2});
AddInstruction(781, xmmmem64, xmm, none, "F20F11/r", {}, {cpuSSE2});
EndMnemonic(opMOVSD, 781);
StartMnemonic(opMOVSHDUP, "MOVSHDUP", 782);
AddInstruction(782, xmm, xmmmem128, none, "F30F16/r", {}, {cpuSSE3});
EndMnemonic(opMOVSHDUP, 782);
StartMnemonic(opMOVSLDUP, "MOVSLDUP", 783);
AddInstruction(783, xmm, xmmmem128, none, "F30F12/r", {}, {cpuSSE3});
EndMnemonic(opMOVSLDUP, 783);
StartMnemonic(opMOVSQ, "MOVSQ", 784);
AddInstruction(784, none, none, none, "A5", {}, {cpuAMD64});
EndMnemonic(opMOVSQ, 784);
StartMnemonic(opMOVSS, "MOVSS", 785);
AddInstruction(785, xmm, xmmmem32, none, "F30F10/r", {}, {cpuSSE});
AddInstruction(786, xmmmem32, xmm, none, "F30F11/r", {}, {cpuSSE});
EndMnemonic(opMOVSS, 786);
StartMnemonic(opMOVSW, "MOVSW", 787);
AddInstruction(787, none, none, none, "A5", {optO16}, {cpu8086});
EndMnemonic(opMOVSW, 787);
StartMnemonic(opMOVSX, "MOVSX", 788);
AddInstruction(788, reg16, regmem8, none, "0FBE/r", {optO16}, {cpu386});
AddInstruction(789, reg32, regmem8, none, "0FBE/r", {optO32}, {cpu386});
AddInstruction(790, reg64, regmem8, none, "0FBE/r", {}, {cpuAMD64});
AddInstruction(791, reg32, regmem16, none, "0FBF/r", {optO32}, {cpu386});
AddInstruction(792, reg64, regmem16, none, "0FBF/r", {}, {cpuAMD64});
EndMnemonic(opMOVSX, 792);
StartMnemonic(opMOVSXD, "MOVSXD", 793);
AddInstruction(793, reg64, regmem32, none, "63/r", {}, {cpuAMD64});
EndMnemonic(opMOVSXD, 793);
StartMnemonic(opMOVUPD, "MOVUPD", 794);
AddInstruction(794, xmm, xmmmem128, none, "660F10/r", {}, {cpuSSE2});
AddInstruction(795, xmmmem128, xmm, none, "660F11/r", {}, {cpuSSE2});
EndMnemonic(opMOVUPD, 795);
StartMnemonic(opMOVUPS, "MOVUPS", 796);
AddInstruction(796, xmm, xmmmem128, none, "0F10/r", {}, {cpuSSE});
AddInstruction(797, xmmmem128, xmm, none, "0F11/r", {}, {cpuSSE});
EndMnemonic(opMOVUPS, 797);
StartMnemonic(opMOVZX, "MOVZX", 798);
AddInstruction(798, reg16, regmem8, none, "0FB6/r", {optO16}, {cpu386});
AddInstruction(799, reg32, regmem8, none, "0FB6/r", {optO32}, {cpu386});
AddInstruction(800, reg64, regmem8, none, "0FB6/r", {}, {cpuAMD64});
AddInstruction(801, reg32, regmem16, none, "0FB7/r", {optO32}, {cpu386});
AddInstruction(802, reg64, regmem16, none, "0FB7/r", {}, {cpuAMD64});
EndMnemonic(opMOVZX, 802);
StartMnemonic(opMUL, "MUL", 803);
AddInstruction(803, regmem8, none, none, "F6/4", {}, {cpu8086});
AddInstruction(804, regmem16, none, none, "F7/4", {optO16}, {cpu8086});
AddInstruction(805, regmem32, none, none, "F7/4", {optO32}, {cpu386});
AddInstruction(806, regmem64, none, none, "F7/4", {}, {cpuAMD64});
AddInstruction(807, AL, regmem8, none, "F6/4", {}, {cpu8086});
AddInstruction(808, AX, regmem16, none, "F7/4", {optO16}, {cpu8086});
AddInstruction(809, EAX, regmem32, none, "F7/4", {optO32}, {cpu386});
AddInstruction(810, RAX, regmem64, none, "F7/4", {}, {cpuAMD64});
EndMnemonic(opMUL, 810);
StartMnemonic(opMULPD, "MULPD", 811);
AddInstruction(811, xmm, xmmmem128, none, "660F59/r", {}, {cpuSSE2});
EndMnemonic(opMULPD, 811);
StartMnemonic(opMULPS, "MULPS", 812);
AddInstruction(812, xmm, xmmmem128, none, "0F59/r", {}, {cpuSSE});
EndMnemonic(opMULPS, 812);
StartMnemonic(opMULSD, "MULSD", 813);
AddInstruction(813, xmm, xmmmem64, none, "F20F59/r", {}, {cpuSSE2});
EndMnemonic(opMULSD, 813);
StartMnemonic(opMULSS, "MULSS", 814);
AddInstruction(814, xmm, xmmmem32, none, "F30F59/r", {}, {cpuSSE});
EndMnemonic(opMULSS, 814);
StartMnemonic(opNEG, "NEG", 815);
AddInstruction(815, regmem8, none, none, "F6/3", {}, {cpu8086});
AddInstruction(816, regmem16, none, none, "F7/3", {optO16}, {cpu8086});
AddInstruction(817, regmem32, none, none, "F7/3", {optO32}, {cpu386});
AddInstruction(818, regmem64, none, none, "F7/3", {}, {cpuAMD64});
EndMnemonic(opNEG, 818);
StartMnemonic(opNOP, "NOP", 819);
AddInstruction(819, none, none, none, "90", {}, {cpu8086});
EndMnemonic(opNOP, 819);
StartMnemonic(opNOT, "NOT", 820);
AddInstruction(820, regmem8, none, none, "F6/2", {}, {cpu8086});
AddInstruction(821, regmem16, none, none, "F7/2", {optO16}, {cpu8086});
AddInstruction(822, regmem32, none, none, "F7/2", {optO32}, {cpu386});
AddInstruction(823, regmem64, none, none, "F7/2", {}, {cpuAMD64});
EndMnemonic(opNOT, 823);
StartMnemonic(opOR, "OR", 824);
AddInstruction(824, regmem8, reg8, none, "08/r", {}, {cpu8086});
AddInstruction(825, regmem16, reg16, none, "09/r", {optO16}, {cpu8086});
AddInstruction(826, regmem32, reg32, none, "09/r", {optO32}, {cpu386});
AddInstruction(827, regmem64, reg64, none, "09/r", {}, {cpuAMD64});
AddInstruction(828, reg8, regmem8, none, "0A/r", {}, {cpu8086});
AddInstruction(829, reg16, regmem16, none, "0B/r", {optO16}, {cpu8086});
AddInstruction(830, reg32, regmem32, none, "0B/r", {optO32}, {cpu386});
AddInstruction(831, reg64, regmem64, none, "0B/r", {}, {cpuAMD64});
AddInstruction(832, AL, imm8, none, "0Cib", {}, {cpu8086});
AddInstruction(833, AX, imm16, none, "0Diw", {optO16}, {cpu8086});
AddInstruction(834, EAX, imm32, none, "0Did", {optO32}, {cpu386});
AddInstruction(835, RAX, imm32, none, "0Did", {}, {cpuAMD64});
AddInstruction(836, regmem8, imm8, none, "80/1ib", {}, {cpu8086});
AddInstruction(837, regmem16, imm16, none, "81/1iw", {optO16}, {cpu8086});
AddInstruction(838, regmem32, imm32, none, "81/1id", {optO32}, {cpu386});
AddInstruction(839, regmem64, imm32, none, "81/1id", {}, {cpuAMD64});
AddInstruction(840, regmem16, simm8, none, "83/1ib", {optO16}, {cpu8086});
AddInstruction(841, regmem32, simm8, none, "83/1ib", {optO32}, {cpu386});
AddInstruction(842, regmem64, simm8, none, "83/1ib", {}, {cpuAMD64});
EndMnemonic(opOR, 842);
StartMnemonic(opORPD, "ORPD", 843);
AddInstruction(843, xmm, xmmmem128, none, "660F56/r", {}, {cpuSSE2});
EndMnemonic(opORPD, 843);
StartMnemonic(opORPS, "ORPS", 844);
AddInstruction(844, xmm, xmmmem128, none, "0F56/r", {}, {cpuSSE});
EndMnemonic(opORPS, 844);
StartMnemonic(opOUT, "OUT", 845);
AddInstruction(845, uimm8, AL, none, "E6ib", {}, {cpu8086});
AddInstruction(846, uimm8, AX, none, "E7ib", {optO16}, {cpu8086});
AddInstruction(847, uimm8, EAX, none, "E7ib", {optO32}, {cpu386});
AddInstruction(848, DX, AL, none, "EE", {}, {cpu8086});
AddInstruction(849, DX, AX, none, "EF", {optO16}, {cpu8086});
AddInstruction(850, DX, EAX, none, "EF", {optO32}, {cpu386});
EndMnemonic(opOUT, 850);
StartMnemonic(opOUTS, "OUTS", 851);
AddInstruction(851, DX, mem8, none, "6E", {}, {cpu186});
AddInstruction(852, DX, mem16, none, "6F", {optO16}, {cpu186});
AddInstruction(853, DX, mem32, none, "6F", {optO32}, {cpu386});
EndMnemonic(opOUTS, 853);
StartMnemonic(opOUTSB, "OUTSB", 854);
AddInstruction(854, none, none, none, "6E", {}, {cpu186});
EndMnemonic(opOUTSB, 854);
StartMnemonic(opOUTSD, "OUTSD", 855);
AddInstruction(855, none, none, none, "6F", {optO32}, {cpu386});
EndMnemonic(opOUTSD, 855);
StartMnemonic(opOUTSW, "OUTSW", 856);
AddInstruction(856, none, none, none, "6F", {optO16}, {cpu186});
EndMnemonic(opOUTSW, 856);
StartMnemonic(opPACKSSDW, "PACKSSDW", 857);
AddInstruction(857, xmm, xmmmem128, none, "660F6B/r", {}, {cpuSSE2});
AddInstruction(858, mmx, mmxmem64, none, "0F6B/r", {}, {cpuMMX});
EndMnemonic(opPACKSSDW, 858);
StartMnemonic(opPACKSSWB, "PACKSSWB", 859);
AddInstruction(859, xmm, xmmmem128, none, "660F63/r", {}, {cpuSSE2});
AddInstruction(860, mmx, mmxmem64, none, "0F63/r", {}, {cpuMMX});
EndMnemonic(opPACKSSWB, 860);
StartMnemonic(opPACKUSWB, "PACKUSWB", 861);
AddInstruction(861, xmm, xmmmem128, none, "660F67/r", {}, {cpuSSE2});
AddInstruction(862, mmx, mmxmem64, none, "0F67/r", {}, {cpuMMX});
EndMnemonic(opPACKUSWB, 862);
StartMnemonic(opPADDB, "PADDB", 863);
AddInstruction(863, xmm, xmmmem128, none, "660FFC/r", {}, {cpuSSE2});
AddInstruction(864, mmx, mmxmem64, none, "0FFC/r", {}, {cpuMMX});
EndMnemonic(opPADDB, 864);
StartMnemonic(opPADDD, "PADDD", 865);
AddInstruction(865, xmm, xmmmem128, none, "660FFE/r", {}, {cpuSSE2});
AddInstruction(866, mmx, mmxmem64, none, "0FFE/r", {}, {cpuMMX});
EndMnemonic(opPADDD, 866);
StartMnemonic(opPADDQ, "PADDQ", 867);
AddInstruction(867, xmm, xmmmem128, none, "660FD4/r", {}, {cpuSSE2});
AddInstruction(868, mmx, mmxmem64, none, "0FD4/r", {}, {cpuMMX});
EndMnemonic(opPADDQ, 868);
StartMnemonic(opPADDSB, "PADDSB", 869);
AddInstruction(869, xmm, xmmmem128, none, "660FEC/r", {}, {cpuSSE2});
AddInstruction(870, mmx, mmxmem64, none, "0FEC/r", {}, {cpuMMX});
EndMnemonic(opPADDSB, 870);
StartMnemonic(opPADDSW, "PADDSW", 871);
AddInstruction(871, xmm, xmmmem128, none, "660FED/r", {}, {cpuSSE2});
AddInstruction(872, mmx, mmxmem64, none, "0FED/r", {}, {cpuMMX});
EndMnemonic(opPADDSW, 872);
StartMnemonic(opPADDUSB, "PADDUSB", 873);
AddInstruction(873, xmm, xmmmem128, none, "660FDC/r", {}, {cpuSSE2});
AddInstruction(874, mmx, mmxmem64, none, "0FDC/r", {}, {cpuMMX});
EndMnemonic(opPADDUSB, 874);
StartMnemonic(opPADDUSW, "PADDUSW", 875);
AddInstruction(875, xmm, xmmmem128, none, "660FDD/r", {}, {cpuSSE2});
AddInstruction(876, mmx, mmxmem64, none, "0FDD/r", {}, {cpuMMX});
EndMnemonic(opPADDUSW, 876);
StartMnemonic(opPADDW, "PADDW", 877);
AddInstruction(877, xmm, xmmmem128, none, "660FFD/r", {}, {cpuSSE2});
AddInstruction(878, mmx, mmxmem64, none, "0FFD/r", {}, {cpuMMX});
EndMnemonic(opPADDW, 878);
StartMnemonic(opPAND, "PAND", 879);
AddInstruction(879, xmm, xmmmem128, none, "660FDB/r", {}, {cpuSSE2});
AddInstruction(880, mmx, mmxmem64, none, "0FDB/r", {}, {cpuMMX});
EndMnemonic(opPAND, 880);
StartMnemonic(opPANDN, "PANDN", 881);
AddInstruction(881, xmm, xmmmem128, none, "660FDF/r", {}, {cpuSSE2});
AddInstruction(882, mmx, mmxmem64, none, "0FDF/r", {}, {cpuMMX});
EndMnemonic(opPANDN, 882);
StartMnemonic(opPAUSE, "PAUSE", 883);
AddInstruction(883, none, none, none, "F390", {}, {cpuSSE2});
EndMnemonic(opPAUSE, 883);
StartMnemonic(opPAVGB, "PAVGB", 884);
AddInstruction(884, xmm, xmmmem128, none, "660FE0/r", {}, {cpuSSE2});
AddInstruction(885, mmx, mmxmem64, none, "0FE0/r", {}, {cpuMMX});
EndMnemonic(opPAVGB, 885);
StartMnemonic(opPAVGUSB, "PAVGUSB", 886);
AddInstruction(886, mmx, mmxmem64, none, "0F0F/rBF", {}, {cpu3DNow});
EndMnemonic(opPAVGUSB, 886);
StartMnemonic(opPAVGW, "PAVGW", 887);
AddInstruction(887, xmm, xmmmem128, none, "660FE3/r", {}, {cpuSSE2});
AddInstruction(888, mmx, mmxmem64, none, "0FE3/r", {}, {cpuMMX});
EndMnemonic(opPAVGW, 888);
StartMnemonic(opPCMPEQB, "PCMPEQB", 889);
AddInstruction(889, xmm, xmmmem128, none, "660F74/r", {}, {cpuSSE2});
AddInstruction(890, mmx, mmxmem64, none, "0F74/r", {}, {cpuMMX});
EndMnemonic(opPCMPEQB, 890);
StartMnemonic(opPCMPEQD, "PCMPEQD", 891);
AddInstruction(891, xmm, xmmmem128, none, "660F76/r", {}, {cpuSSE2});
AddInstruction(892, mmx, mmxmem64, none, "0F76/r", {}, {cpuMMX});
EndMnemonic(opPCMPEQD, 892);
StartMnemonic(opPCMPEQW, "PCMPEQW", 893);
AddInstruction(893, xmm, xmmmem128, none, "660F75/r", {}, {cpuSSE2});
AddInstruction(894, mmx, mmxmem64, none, "0F75/r", {}, {cpuMMX});
EndMnemonic(opPCMPEQW, 894);
StartMnemonic(opPCMPGTB, "PCMPGTB", 895);
AddInstruction(895, xmm, xmmmem128, none, "660F64/r", {}, {cpuSSE2});
AddInstruction(896, mmx, mmxmem64, none, "0F64/r", {}, {cpuMMX});
EndMnemonic(opPCMPGTB, 896);
StartMnemonic(opPCMPGTD, "PCMPGTD", 897);
AddInstruction(897, xmm, xmmmem128, none, "660F66/r", {}, {cpuSSE2});
AddInstruction(898, mmx, mmxmem64, none, "0F66/r", {}, {cpuMMX});
EndMnemonic(opPCMPGTD, 898);
StartMnemonic(opPCMPGTW, "PCMPGTW", 899);
AddInstruction(899, xmm, xmmmem128, none, "660F65/r", {}, {cpuSSE2});
AddInstruction(900, mmx, mmxmem64, none, "0F65/r", {}, {cpuMMX});
EndMnemonic(opPCMPGTW, 900);
StartMnemonic(opPEXTRW, "PEXTRW", 901);
AddInstruction(901, reg32, xmm, uimm8, "660FC5/rib", {}, {cpuSSE2});
AddInstruction(902, reg32, mmx, uimm8, "0FC5/rib", {}, {cpuMMX});
EndMnemonic(opPEXTRW, 902);
StartMnemonic(opPF2ID, "PF2ID", 903);
AddInstruction(903, mmx, mmxmem64, none, "0F0F/r1D", {}, {cpu3DNow});
EndMnemonic(opPF2ID, 903);
StartMnemonic(opPF2IW, "PF2IW", 904);
AddInstruction(904, mmx, mmxmem64, none, "0F0F/r1C", {}, {cpu3DNow});
EndMnemonic(opPF2IW, 904);
StartMnemonic(opPFACC, "PFACC", 905);
AddInstruction(905, mmx, mmxmem64, none, "0F0F/rAE", {}, {cpu3DNow});
EndMnemonic(opPFACC, 905);
StartMnemonic(opPFADD, "PFADD", 906);
AddInstruction(906, mmx, mmxmem64, none, "0F0F/r9E", {}, {cpu3DNow});
EndMnemonic(opPFADD, 906);
StartMnemonic(opPFCMPEQ, "PFCMPEQ", 907);
AddInstruction(907, mmx, mmxmem64, none, "0F0F/rB0", {}, {cpu3DNow});
EndMnemonic(opPFCMPEQ, 907);
StartMnemonic(opPFCMPGE, "PFCMPGE", 908);
AddInstruction(908, mmx, mmxmem64, none, "0F0F/r90", {}, {cpu3DNow});
EndMnemonic(opPFCMPGE, 908);
StartMnemonic(opPFCMPGT, "PFCMPGT", 909);
AddInstruction(909, mmx, mmxmem64, none, "0F0F/rA0", {}, {cpu3DNow});
EndMnemonic(opPFCMPGT, 909);
StartMnemonic(opPFMAX, "PFMAX", 910);
AddInstruction(910, mmx, mmxmem64, none, "0F0F/rA4", {}, {cpu3DNow});
EndMnemonic(opPFMAX, 910);
StartMnemonic(opPFMIN, "PFMIN", 911);
AddInstruction(911, mmx, mmxmem64, none, "0F0F/r94", {}, {cpu3DNow});
EndMnemonic(opPFMIN, 911);
StartMnemonic(opPFMUL, "PFMUL", 912);
AddInstruction(912, mmx, mmxmem64, none, "0F0F/rB4", {}, {cpu3DNow});
EndMnemonic(opPFMUL, 912);
StartMnemonic(opPFNACC, "PFNACC", 913);
AddInstruction(913, mmx, mmxmem64, none, "0F0F/r8A", {}, {cpu3DNow});
EndMnemonic(opPFNACC, 913);
StartMnemonic(opPFPNACC, "PFPNACC", 914);
AddInstruction(914, mmx, mmxmem64, none, "0F0F/r8E", {}, {cpu3DNow});
EndMnemonic(opPFPNACC, 914);
StartMnemonic(opPFRCP, "PFRCP", 915);
AddInstruction(915, mmx, mmxmem64, none, "0F0F/r96", {}, {cpu3DNow});
EndMnemonic(opPFRCP, 915);
StartMnemonic(opPFRCPIT1, "PFRCPIT1", 916);
AddInstruction(916, mmx, mmxmem64, none, "0F0F/rA6", {}, {cpu3DNow});
EndMnemonic(opPFRCPIT1, 916);
StartMnemonic(opPFRCPIT2, "PFRCPIT2", 917);
AddInstruction(917, mmx, mmxmem64, none, "0F0F/rB6", {}, {cpu3DNow});
EndMnemonic(opPFRCPIT2, 917);
StartMnemonic(opPFRSQIT1, "PFRSQIT1", 918);
AddInstruction(918, mmx, mmxmem64, none, "0F0F/rA7", {}, {cpu3DNow});
EndMnemonic(opPFRSQIT1, 918);
StartMnemonic(opPFRSQRT, "PFRSQRT", 919);
AddInstruction(919, mmx, mmxmem64, none, "0F0F/r97", {}, {cpu3DNow});
EndMnemonic(opPFRSQRT, 919);
StartMnemonic(opPFSUB, "PFSUB", 920);
AddInstruction(920, mmx, mmxmem64, none, "0F0F/r9A", {}, {cpu3DNow});
EndMnemonic(opPFSUB, 920);
StartMnemonic(opPFSUBR, "PFSUBR", 921);
AddInstruction(921, mmx, mmxmem64, none, "0F0F/rAA", {}, {cpu3DNow});
EndMnemonic(opPFSUBR, 921);
StartMnemonic(opPI2FD, "PI2FD", 922);
AddInstruction(922, mmx, mmxmem64, none, "0F0F/r0D", {}, {cpu3DNow});
EndMnemonic(opPI2FD, 922);
StartMnemonic(opPI2FW, "PI2FW", 923);
AddInstruction(923, mmx, mmxmem64, none, "0F0F/r0C", {}, {cpu3DNow});
EndMnemonic(opPI2FW, 923);
StartMnemonic(opPINSRW, "PINSRW", 924);
AddInstruction(924, xmm, regmem16, uimm8, "660FC4/rib", {}, {cpuSSE2});
AddInstruction(925, xmm, regmem32, uimm8, "660FC4/rib", {}, {cpuSSE2});
AddInstruction(926, mmx, regmem16, uimm8, "0FC4/rib", {}, {cpuMMX});
AddInstruction(927, mmx, regmem32, uimm8, "0FC4/rib", {}, {cpuMMX});
EndMnemonic(opPINSRW, 927);
StartMnemonic(opPMADDWD, "PMADDWD", 928);
AddInstruction(928, xmm, xmmmem128, none, "660FF5/r", {}, {cpuSSE2});
AddInstruction(929, mmx, mmxmem64, none, "0FF5/r", {}, {cpuMMX});
EndMnemonic(opPMADDWD, 929);
StartMnemonic(opPMAXSW, "PMAXSW", 930);
AddInstruction(930, xmm, xmmmem128, none, "660FEE/r", {}, {cpuSSE2});
AddInstruction(931, mmx, mmxmem64, none, "0FEE/r", {}, {cpuMMX});
EndMnemonic(opPMAXSW, 931);
StartMnemonic(opPMAXUB, "PMAXUB", 932);
AddInstruction(932, xmm, xmmmem128, none, "660FDE/r", {}, {cpuSSE2});
AddInstruction(933, mmx, mmxmem64, none, "0FDE/r", {}, {cpuMMX});
EndMnemonic(opPMAXUB, 933);
StartMnemonic(opPMINSW, "PMINSW", 934);
AddInstruction(934, xmm, xmmmem128, none, "660FEA/r", {}, {cpuSSE2});
AddInstruction(935, mmx, mmxmem64, none, "0FEA/r", {}, {cpuMMX});
EndMnemonic(opPMINSW, 935);
StartMnemonic(opPMINUB, "PMINUB", 936);
AddInstruction(936, xmm, xmmmem128, none, "660FDA/r", {}, {cpuSSE2});
AddInstruction(937, mmx, mmxmem64, none, "0FDA/r", {}, {cpuMMX});
EndMnemonic(opPMINUB, 937);
StartMnemonic(opPMOVMSKB, "PMOVMSKB", 938);
AddInstruction(938, reg32, xmm, none, "660FD7/r", {}, {cpuSSE2});
AddInstruction(939, reg32, mmx, none, "0FD7/r", {}, {cpuMMX});
EndMnemonic(opPMOVMSKB, 939);
StartMnemonic(opPMULHRW, "PMULHRW", 940);
AddInstruction(940, mmx, mmxmem64, none, "0F0F/rB7", {}, {cpu3DNow});
EndMnemonic(opPMULHRW, 940);
StartMnemonic(opPMULHUW, "PMULHUW", 941);
AddInstruction(941, xmm, xmmmem128, none, "660FE4/r", {}, {cpuSSE2});
AddInstruction(942, mmx, mmxmem64, none, "0FE4/r", {}, {cpuMMX});
EndMnemonic(opPMULHUW, 942);
StartMnemonic(opPMULHW, "PMULHW", 943);
AddInstruction(943, xmm, xmmmem128, none, "660FE5/r", {}, {cpuSSE2});
AddInstruction(944, mmx, mmxmem64, none, "0FE5/r", {}, {cpuMMX});
EndMnemonic(opPMULHW, 944);
StartMnemonic(opPMULLW, "PMULLW", 945);
AddInstruction(945, xmm, xmmmem128, none, "660FD5/r", {}, {cpuSSE2});
AddInstruction(946, mmx, mmxmem64, none, "0FD5/r", {}, {cpuMMX});
EndMnemonic(opPMULLW, 946);
StartMnemonic(opPMULUDQ, "PMULUDQ", 947);
AddInstruction(947, xmm, xmmmem128, none, "660FF4/r", {}, {cpuSSE2});
AddInstruction(948, mmx, mmxmem64, none, "0FF4/r", {}, {cpuSSE2});
EndMnemonic(opPMULUDQ, 948);
StartMnemonic(opPOP, "POP", 949);
AddInstruction(949, reg16, none, none, "58rw", {optO16}, {cpu8086});
AddInstruction(950, reg32, none, none, "58rd", {optO32}, {cpu386});
AddInstruction(951, reg64, none, none, "58rq", {}, {cpuAMD64});
AddInstruction(952, regmem16, none, none, "8F/0", {optO16}, {cpu8086});
AddInstruction(953, regmem32, none, none, "8F/0", {optO32}, {cpu386});
AddInstruction(954, regmem64, none, none, "8F/0", {}, {cpuAMD64});
AddInstruction(955, DS, none, none, "1F", {optNot64}, {cpu8086});
AddInstruction(956, ES, none, none, "07", {optNot64}, {cpu8086});
AddInstruction(957, SS, none, none, "17", {optNot64}, {cpu8086});
AddInstruction(958, FS, none, none, "0FA1", {}, {cpu386});
AddInstruction(959, GS, none, none, "0FA9", {}, {cpu386});
EndMnemonic(opPOP, 959);
StartMnemonic(opPOPA, "POPA", 960);
AddInstruction(960, none, none, none, "61", {optNot64}, {cpu186});
EndMnemonic(opPOPA, 960);
StartMnemonic(opPOPAD, "POPAD", 961);
AddInstruction(961, none, none, none, "61", {optO32,optNot64}, {cpu386});
EndMnemonic(opPOPAD, 961);
StartMnemonic(opPOPAW, "POPAW", 962);
AddInstruction(962, none, none, none, "61", {optO16,optNot64}, {cpu186});
EndMnemonic(opPOPAW, 962);
StartMnemonic(opPOPF, "POPF", 963);
AddInstruction(963, none, none, none, "9D", {}, {cpu8086});
EndMnemonic(opPOPF, 963);
StartMnemonic(opPOPFD, "POPFD", 964);
AddInstruction(964, none, none, none, "9D", {optO32}, {cpu386});
EndMnemonic(opPOPFD, 964);
StartMnemonic(opPOPFQ, "POPFQ", 965);
AddInstruction(965, none, none, none, "9D", {}, {cpuAMD64});
EndMnemonic(opPOPFQ, 965);
StartMnemonic(opPOR, "POR", 966);
AddInstruction(966, xmm, xmmmem128, none, "660FEB/r", {}, {cpuSSE2});
AddInstruction(967, mmx, mmxmem64, none, "0FEB/r", {}, {cpuMMX});
EndMnemonic(opPOR, 967);
StartMnemonic(opPREFETCH, "PREFETCH", 968);
AddInstruction(968, mem8, none, none, "0F0D/0", {}, {cpu3DNow});
EndMnemonic(opPREFETCH, 968);
StartMnemonic(opPREFETCHNTA, "PREFETCHNTA", 969);
AddInstruction(969, mem8, none, none, "0F18/0", {}, {cpuSSE,cpuMMX});
EndMnemonic(opPREFETCHNTA, 969);
StartMnemonic(opPREFETCHT0, "PREFETCHT0", 970);
AddInstruction(970, mem8, none, none, "0F18/1", {}, {cpuSSE,cpuMMX});
EndMnemonic(opPREFETCHT0, 970);
StartMnemonic(opPREFETCHT1, "PREFETCHT1", 971);
AddInstruction(971, mem8, none, none, "0F18/2", {}, {cpuSSE,cpuMMX});
EndMnemonic(opPREFETCHT1, 971);
StartMnemonic(opPREFETCHT2, "PREFETCHT2", 972);
AddInstruction(972, mem8, none, none, "0F18/3", {}, {cpuSSE,cpuMMX});
EndMnemonic(opPREFETCHT2, 972);
StartMnemonic(opPREFETCHW, "PREFETCHW", 973);
AddInstruction(973, mem8, none, none, "0F0D/1", {}, {cpu3DNow});
EndMnemonic(opPREFETCHW, 973);
StartMnemonic(opPSADBW, "PSADBW", 974);
AddInstruction(974, xmm, xmmmem128, none, "660FF6/r", {}, {cpuSSE2});
AddInstruction(975, mmx, mmxmem64, none, "0FF6/r", {}, {cpuMMX});
EndMnemonic(opPSADBW, 975);
StartMnemonic(opPSHUFD, "PSHUFD", 976);
AddInstruction(976, xmm, xmmmem128, uimm8, "660F70/rib", {}, {cpuSSE2});
EndMnemonic(opPSHUFD, 976);
StartMnemonic(opPSHUFHW, "PSHUFHW", 977);
AddInstruction(977, xmm, xmmmem128, uimm8, "F30F70/rib", {}, {cpuSSE2});
EndMnemonic(opPSHUFHW, 977);
StartMnemonic(opPSHUFLW, "PSHUFLW", 978);
AddInstruction(978, xmm, xmmmem128, uimm8, "F20F70/rib", {}, {cpuSSE2});
EndMnemonic(opPSHUFLW, 978);
StartMnemonic(opPSHUFW, "PSHUFW", 979);
AddInstruction(979, mmx, mmxmem64, imm8, "0F70/rib", {}, {cpuSSE2});
EndMnemonic(opPSHUFW, 979);
StartMnemonic(opPSLLD, "PSLLD", 980);
AddInstruction(980, xmm, xmmmem128, none, "660FF2/r", {}, {cpuSSE2});
AddInstruction(981, xmm, uimm8, none, "660F72/6ib", {}, {cpuSSE2});
AddInstruction(982, mmx, mmxmem64, none, "0FF2/r", {}, {cpuMMX});
AddInstruction(983, mmx, imm8, none, "0F72/6ib", {}, {cpuMMX});
EndMnemonic(opPSLLD, 983);
StartMnemonic(opPSLLDQ, "PSLLDQ", 984);
AddInstruction(984, xmm, uimm8, none, "660F73/7ib", {}, {cpuSSE2});
EndMnemonic(opPSLLDQ, 984);
StartMnemonic(opPSLLQ, "PSLLQ", 985);
AddInstruction(985, xmm, xmmmem128, none, "660FF3/r", {}, {cpuSSE2});
AddInstruction(986, xmm, uimm8, none, "660F73/6ib", {}, {cpuSSE2});
AddInstruction(987, mmx, mmxmem64, none, "0FF3/r", {}, {cpuMMX});
AddInstruction(988, mmx, imm8, none, "0F73/6ib", {}, {cpuMMX});
EndMnemonic(opPSLLQ, 988);
StartMnemonic(opPSLLW, "PSLLW", 989);
AddInstruction(989, xmm, xmmmem128, none, "660FF1/r", {}, {cpuSSE2});
AddInstruction(990, xmm, uimm8, none, "660F71/6ib", {}, {cpuSSE2});
AddInstruction(991, mmx, mmxmem64, none, "0FF1/r", {}, {cpuMMX});
AddInstruction(992, mmx, imm8, none, "0F71/6ib", {}, {cpuMMX});
EndMnemonic(opPSLLW, 992);
StartMnemonic(opPSRAD, "PSRAD", 993);
AddInstruction(993, xmm, xmmmem128, none, "660FE2/r", {}, {cpuSSE2});
AddInstruction(994, xmm, uimm8, none, "660F72/4ib", {}, {cpuSSE2});
AddInstruction(995, mmx, mmxmem64, none, "0FE2/r", {}, {cpuMMX});
AddInstruction(996, mmx, imm8, none, "0F72/4ib", {}, {cpuMMX});
EndMnemonic(opPSRAD, 996);
StartMnemonic(opPSRAW, "PSRAW", 997);
AddInstruction(997, xmm, xmmmem128, none, "660FE1/r", {}, {cpuSSE2});
AddInstruction(998, xmm, uimm8, none, "660F71/4ib", {}, {cpuSSE2});
AddInstruction(999, mmx, mmxmem64, none, "0FE1/r", {}, {cpuMMX});
AddInstruction(1000, mmx, imm8, none, "0F71/4ib", {}, {cpuMMX});
EndMnemonic(opPSRAW, 1000);
StartMnemonic(opPSRLD, "PSRLD", 1001);
AddInstruction(1001, xmm, xmmmem128, none, "660FD2/r", {}, {cpuSSE2});
AddInstruction(1002, xmm, uimm8, none, "660F72/2ib", {}, {cpuSSE2});
AddInstruction(1003, mmx, mmxmem64, none, "0FD2/r", {}, {cpuMMX});
AddInstruction(1004, mmx, imm8, none, "0F72/2ib", {}, {cpuMMX});
EndMnemonic(opPSRLD, 1004);
StartMnemonic(opPSRLDQ, "PSRLDQ", 1005);
AddInstruction(1005, xmm, uimm8, none, "660F73/3ib", {}, {cpuSSE2});
EndMnemonic(opPSRLDQ, 1005);
StartMnemonic(opPSRLQ, "PSRLQ", 1006);
AddInstruction(1006, xmm, xmmmem128, none, "660FD3/r", {}, {cpuSSE2});
AddInstruction(1007, xmm, uimm8, none, "660F73/2ib", {}, {cpuSSE2});
AddInstruction(1008, mmx, mmxmem64, none, "0FD3/r", {}, {cpuMMX});
AddInstruction(1009, mmx, imm8, none, "0F73/2ib", {}, {cpuMMX});
EndMnemonic(opPSRLQ, 1009);
StartMnemonic(opPSRLW, "PSRLW", 1010);
AddInstruction(1010, xmm, xmmmem128, none, "660FD1/r", {}, {cpuSSE2});
AddInstruction(1011, xmm, uimm8, none, "660F71/2ib", {}, {cpuSSE2});
AddInstruction(1012, mmx, mmxmem64, none, "0FD1/r", {}, {cpuMMX});
AddInstruction(1013, mmx, imm8, none, "0F71/2ib", {}, {cpuMMX});
EndMnemonic(opPSRLW, 1013);
StartMnemonic(opPSUBB, "PSUBB", 1014);
AddInstruction(1014, xmm, xmmmem128, none, "660FF8/r", {}, {cpuSSE2});
AddInstruction(1015, mmx, mmxmem64, none, "0FF8/r", {}, {cpuMMX});
EndMnemonic(opPSUBB, 1015);
StartMnemonic(opPSUBD, "PSUBD", 1016);
AddInstruction(1016, xmm, xmmmem128, none, "660FFA/r", {}, {cpuSSE2});
AddInstruction(1017, mmx, mmxmem64, none, "0FFA/r", {}, {cpuMMX});
EndMnemonic(opPSUBD, 1017);
StartMnemonic(opPSUBQ, "PSUBQ", 1018);
AddInstruction(1018, xmm, xmmmem128, none, "660FFB/r", {}, {cpuSSE2});
AddInstruction(1019, mmx, mmxmem64, none, "0FFB/r", {}, {cpuMMX});
EndMnemonic(opPSUBQ, 1019);
StartMnemonic(opPSUBSB, "PSUBSB", 1020);
AddInstruction(1020, xmm, xmmmem128, none, "660FE8/r", {}, {cpuSSE2});
AddInstruction(1021, mmx, mmxmem64, none, "0FE8/r", {}, {cpuMMX});
EndMnemonic(opPSUBSB, 1021);
StartMnemonic(opPSUBSW, "PSUBSW", 1022);
AddInstruction(1022, xmm, xmmmem128, none, "660FE9/r", {}, {cpuSSE2});
AddInstruction(1023, mmx, mmxmem64, none, "0FE9/r", {}, {cpuMMX});
EndMnemonic(opPSUBSW, 1023);
StartMnemonic(opPSUBUSB, "PSUBUSB", 1024);
AddInstruction(1024, xmm, xmmmem128, none, "660FD8/r", {}, {cpuSSE2});
AddInstruction(1025, mmx, mmxmem64, none, "0FD8/r", {}, {cpuMMX});
EndMnemonic(opPSUBUSB, 1025);
StartMnemonic(opPSUBUSW, "PSUBUSW", 1026);
AddInstruction(1026, xmm, xmmmem128, none, "660FD9/r", {}, {cpuSSE2});
AddInstruction(1027, mmx, mmxmem64, none, "0FD9/r", {}, {cpuMMX});
EndMnemonic(opPSUBUSW, 1027);
StartMnemonic(opPSUBW, "PSUBW", 1028);
AddInstruction(1028, xmm, xmmmem128, none, "660FF9/r", {}, {cpuSSE2});
AddInstruction(1029, mmx, mmxmem64, none, "0FF9/r", {}, {cpuMMX});
EndMnemonic(opPSUBW, 1029);
StartMnemonic(opPSWAPD, "PSWAPD", 1030);
AddInstruction(1030, mmx, mmxmem64, none, "0F0F/rBB", {}, {cpu3DNow});
EndMnemonic(opPSWAPD, 1030);
StartMnemonic(opPUNPCKHBW, "PUNPCKHBW", 1031);
AddInstruction(1031, xmm, xmmmem128, none, "660F68/r", {}, {cpuSSE2});
AddInstruction(1032, mmx, mmxmem64, none, "0F68/r", {}, {cpuMMX});
EndMnemonic(opPUNPCKHBW, 1032);
StartMnemonic(opPUNPCKHDQ, "PUNPCKHDQ", 1033);
AddInstruction(1033, xmm, xmmmem128, none, "660F6A/r", {}, {cpuSSE2});
AddInstruction(1034, mmx, mmxmem64, none, "0F6A/r", {}, {cpuMMX});
EndMnemonic(opPUNPCKHDQ, 1034);
StartMnemonic(opPUNPCKHQDQ, "PUNPCKHQDQ", 1035);
AddInstruction(1035, xmm, xmmmem128, none, "660F6D/r", {}, {cpuSSE2});
EndMnemonic(opPUNPCKHQDQ, 1035);
StartMnemonic(opPUNPCKHWD, "PUNPCKHWD", 1036);
AddInstruction(1036, xmm, xmmmem128, none, "660F69/r", {}, {cpuSSE2});
AddInstruction(1037, mmx, mmxmem64, none, "0F69/r", {}, {cpuMMX});
EndMnemonic(opPUNPCKHWD, 1037);
StartMnemonic(opPUNPCKLBW, "PUNPCKLBW", 1038);
AddInstruction(1038, xmm, xmmmem128, none, "660F60/r", {}, {cpuSSE2});
AddInstruction(1039, mmx, mmxmem32, none, "0F60/r", {}, {cpuMMX});
EndMnemonic(opPUNPCKLBW, 1039);
StartMnemonic(opPUNPCKLDQ, "PUNPCKLDQ", 1040);
AddInstruction(1040, xmm, xmmmem128, none, "660F62/r", {}, {cpuSSE2});
AddInstruction(1041, mmx, mmxmem32, none, "0F62/r", {}, {cpuMMX});
EndMnemonic(opPUNPCKLDQ, 1041);
StartMnemonic(opPUNPCKLQDQ, "PUNPCKLQDQ", 1042);
AddInstruction(1042, xmm, xmmmem128, none, "660F6C/r", {}, {cpuSSE2});
EndMnemonic(opPUNPCKLQDQ, 1042);
StartMnemonic(opPUNPCKLWD, "PUNPCKLWD", 1043);
AddInstruction(1043, xmm, xmmmem128, none, "660F61/r", {}, {cpuSSE2});
AddInstruction(1044, mmx, mmxmem32, none, "0F61/r", {}, {cpuMMX});
EndMnemonic(opPUNPCKLWD, 1044);
StartMnemonic(opPUSH, "PUSH", 1045);
AddInstruction(1045, reg16, none, none, "50rw", {optO16}, {cpu8086});
AddInstruction(1046, reg32, none, none, "50rd", {optO32}, {cpu386});
AddInstruction(1047, reg64, none, none, "50rq", {}, {cpuAMD64});
AddInstruction(1048, regmem16, none, none, "FF/6", {optO16}, {cpu8086});
AddInstruction(1049, regmem32, none, none, "FF/6", {optO32}, {cpu386});
AddInstruction(1050, regmem64, none, none, "FF/6", {}, {cpuAMD64});
AddInstruction(1051, imm8, none, none, "6Aib", {}, {cpu186});
AddInstruction(1052, imm16, none, none, "68iw", {}, {cpu186});
AddInstruction(1053, imm32, none, none, "68id", {}, {cpu186});
AddInstruction(1054, imm64, none, none, "68id", {}, {cpu186});
AddInstruction(1055, CS, none, none, "0E", {optNot64}, {cpu8086});
AddInstruction(1056, SS, none, none, "16", {optNot64}, {cpu8086});
AddInstruction(1057, DS, none, none, "1E", {optNot64}, {cpu8086});
AddInstruction(1058, ES, none, none, "06", {optNot64}, {cpu8086});
AddInstruction(1059, FS, none, none, "0FA0", {}, {cpu386});
AddInstruction(1060, GS, none, none, "0FA8", {}, {cpu386});
EndMnemonic(opPUSH, 1060);
StartMnemonic(opPUSHA, "PUSHA", 1061);
AddInstruction(1061, none, none, none, "60", {optNot64}, {cpu186});
EndMnemonic(opPUSHA, 1061);
StartMnemonic(opPUSHAD, "PUSHAD", 1062);
AddInstruction(1062, none, none, none, "60", {optO32,optNot64}, {cpu386});
EndMnemonic(opPUSHAD, 1062);
StartMnemonic(opPUSHF, "PUSHF", 1063);
AddInstruction(1063, none, none, none, "9C", {}, {cpu8086});
EndMnemonic(opPUSHF, 1063);
StartMnemonic(opPUSHFD, "PUSHFD", 1064);
AddInstruction(1064, none, none, none, "9C", {optO32}, {cpu386});
EndMnemonic(opPUSHFD, 1064);
StartMnemonic(opPUSHFQ, "PUSHFQ", 1065);
AddInstruction(1065, none, none, none, "9C", {}, {cpuAMD64});
EndMnemonic(opPUSHFQ, 1065);
StartMnemonic(opPXOR, "PXOR", 1066);
AddInstruction(1066, xmm, xmmmem128, none, "660FEF/r", {}, {cpuSSE2});
AddInstruction(1067, mmx, mmxmem64, none, "0FEF/r", {}, {cpuMMX});
EndMnemonic(opPXOR, 1067);
StartMnemonic(opRCL, "RCL", 1068);
AddInstruction(1068, regmem8, one, none, "D0/2", {}, {cpu8086});
AddInstruction(1069, regmem8, CL, none, "D2/2", {}, {cpu8086});
AddInstruction(1070, regmem8, uimm8, none, "C0/2ib", {}, {cpu186});
AddInstruction(1071, regmem16, one, none, "D1/2", {optO16}, {cpu8086});
AddInstruction(1072, regmem16, CL, none, "D3/2", {optO16}, {cpu8086});
AddInstruction(1073, regmem16, uimm8, none, "C1/2ib", {optO16}, {cpu186});
AddInstruction(1074, regmem32, one, none, "D1/2", {optO32}, {cpu386});
AddInstruction(1075, regmem32, CL, none, "D3/2", {optO32}, {cpu386});
AddInstruction(1076, regmem32, uimm8, none, "C1/2ib", {optO32}, {cpu386});
AddInstruction(1077, regmem64, one, none, "D1/2", {}, {cpuAMD64});
AddInstruction(1078, regmem64, CL, none, "D3/2", {}, {cpuAMD64});
AddInstruction(1079, regmem64, uimm8, none, "C1/2ib", {}, {cpuAMD64});
EndMnemonic(opRCL, 1079);
StartMnemonic(opRCPPS, "RCPPS", 1080);
AddInstruction(1080, xmm, xmmmem128, none, "0F53/r", {}, {cpuSSE});
EndMnemonic(opRCPPS, 1080);
StartMnemonic(opRCPSS, "RCPSS", 1081);
AddInstruction(1081, xmm, xmmmem32, none, "F30F53/r", {}, {cpuSSE});
EndMnemonic(opRCPSS, 1081);
StartMnemonic(opRCR, "RCR", 1082);
AddInstruction(1082, regmem8, one, none, "D0/3", {}, {cpu8086});
AddInstruction(1083, regmem8, CL, none, "D2/3", {}, {cpu8086});
AddInstruction(1084, regmem8, uimm8, none, "C0/3ib", {}, {cpu186});
AddInstruction(1085, regmem16, one, none, "D1/3", {optO16}, {cpu8086});
AddInstruction(1086, regmem16, CL, none, "D3/3", {optO16}, {cpu8086});
AddInstruction(1087, regmem16, uimm8, none, "C1/3ib", {optO16}, {cpu186});
AddInstruction(1088, regmem32, one, none, "D1/3", {optO32}, {cpu386});
AddInstruction(1089, regmem32, CL, none, "D3/3", {optO32}, {cpu386});
AddInstruction(1090, regmem32, uimm8, none, "C1/3ib", {optO32}, {cpu386});
AddInstruction(1091, regmem64, one, none, "D1/3", {}, {cpuAMD64});
AddInstruction(1092, regmem64, CL, none, "D3/3", {}, {cpuAMD64});
AddInstruction(1093, regmem64, uimm8, none, "C1/3ib", {}, {cpuAMD64});
EndMnemonic(opRCR, 1093);
StartMnemonic(opRDMSR, "RDMSR", 1094);
AddInstruction(1094, none, none, none, "0F32", {}, {cpuPentium,cpuPrivileged});
EndMnemonic(opRDMSR, 1094);
StartMnemonic(opRDPMC, "RDPMC", 1095);
AddInstruction(1095, none, none, none, "0F33", {}, {cpuP6});
EndMnemonic(opRDPMC, 1095);
StartMnemonic(opRDTSC, "RDTSC", 1096);
AddInstruction(1096, none, none, none, "0F31", {}, {cpuPentium});
EndMnemonic(opRDTSC, 1096);
StartMnemonic(opRDTSCP, "RDTSCP", 1097);
AddInstruction(1097, none, none, none, "0F01F9", {}, {cpuPentium});
EndMnemonic(opRDTSCP, 1097);
StartMnemonic(opRET, "RET", 1098);
AddInstruction(1098, none, none, none, "C3", {}, {cpu8086});
AddInstruction(1099, uimm16, none, none, "C2iw", {}, {cpu8086});
EndMnemonic(opRET, 1099);
StartMnemonic(opRETF, "RETF", 1100);
AddInstruction(1100, none, none, none, "CB", {}, {cpu8086});
AddInstruction(1101, uimm16, none, none, "CAiw", {}, {cpu8086});
EndMnemonic(opRETF, 1101);
StartMnemonic(opROL, "ROL", 1102);
AddInstruction(1102, regmem8, one, none, "D0/0", {}, {cpu8086});
AddInstruction(1103, regmem8, CL, none, "D2/0", {}, {cpu8086});
AddInstruction(1104, regmem8, uimm8, none, "C0/0ib", {}, {cpu186});
AddInstruction(1105, regmem16, one, none, "D1/0", {optO16}, {cpu8086});
AddInstruction(1106, regmem16, CL, none, "D3/0", {optO16}, {cpu8086});
AddInstruction(1107, regmem16, uimm8, none, "C1/0ib", {optO16}, {cpu186});
AddInstruction(1108, regmem32, one, none, "D1/0", {optO32}, {cpu386});
AddInstruction(1109, regmem32, CL, none, "D3/0", {optO32}, {cpu386});
AddInstruction(1110, regmem32, uimm8, none, "C1/0ib", {optO32}, {cpu386});
AddInstruction(1111, regmem64, one, none, "D1/0", {}, {cpuAMD64});
AddInstruction(1112, regmem64, CL, none, "D3/0", {}, {cpuAMD64});
AddInstruction(1113, regmem64, uimm8, none, "C1/0ib", {}, {cpuAMD64});
EndMnemonic(opROL, 1113);
StartMnemonic(opROR, "ROR", 1114);
AddInstruction(1114, regmem8, one, none, "D0/1", {}, {cpu8086});
AddInstruction(1115, regmem8, CL, none, "D2/1", {}, {cpu8086});
AddInstruction(1116, regmem8, uimm8, none, "C0/1ib", {}, {cpu186});
AddInstruction(1117, regmem16, one, none, "D1/1", {optO16}, {cpu8086});
AddInstruction(1118, regmem16, CL, none, "D3/1", {optO16}, {cpu8086});
AddInstruction(1119, regmem16, uimm8, none, "C1/1ib", {optO16}, {cpu186});
AddInstruction(1120, regmem32, one, none, "D1/1", {optO32}, {cpu386});
AddInstruction(1121, regmem32, CL, none, "D3/1", {optO32}, {cpu386});
AddInstruction(1122, regmem32, uimm8, none, "C1/1ib", {optO32}, {cpu386});
AddInstruction(1123, regmem64, one, none, "D1/1", {}, {cpuAMD64});
AddInstruction(1124, regmem64, CL, none, "D3/1", {}, {cpuAMD64});
AddInstruction(1125, regmem64, uimm8, none, "C1/1ib", {}, {cpuAMD64});
EndMnemonic(opROR, 1125);
StartMnemonic(opRSM, "RSM", 1126);
AddInstruction(1126, none, none, none, "0FAA", {}, {});
EndMnemonic(opRSM, 1126);
StartMnemonic(opRSQRTPS, "RSQRTPS", 1127);
AddInstruction(1127, xmm, xmmmem128, none, "0F52/r", {}, {cpuSSE});
EndMnemonic(opRSQRTPS, 1127);
StartMnemonic(opRSQRTSS, "RSQRTSS", 1128);
AddInstruction(1128, xmm, xmmmem32, none, "F30F52/r", {}, {cpuSSE});
EndMnemonic(opRSQRTSS, 1128);
StartMnemonic(opSAHF, "SAHF", 1129);
AddInstruction(1129, none, none, none, "9E", {}, {cpu8086});
EndMnemonic(opSAHF, 1129);
StartMnemonic(opSAL, "SAL", 1130);
AddInstruction(1130, regmem8, one, none, "D0/4", {}, {cpu8086});
AddInstruction(1131, regmem8, CL, none, "D2/4", {}, {cpu8086});
AddInstruction(1132, regmem8, uimm8, none, "C0/4ib", {}, {cpu186});
AddInstruction(1133, regmem16, one, none, "D1/4", {optO16}, {cpu8086});
AddInstruction(1134, regmem16, CL, none, "D3/4", {optO16}, {cpu8086});
AddInstruction(1135, regmem16, uimm8, none, "C1/4ib", {optO16}, {cpu186});
AddInstruction(1136, regmem32, one, none, "D1/4", {optO32}, {cpu386});
AddInstruction(1137, regmem32, CL, none, "D3/4", {optO32}, {cpu386});
AddInstruction(1138, regmem32, uimm8, none, "C1/4ib", {optO32}, {cpu386});
AddInstruction(1139, regmem64, one, none, "D1/4", {}, {cpuAMD64});
AddInstruction(1140, regmem64, CL, none, "D3/4", {}, {cpuAMD64});
AddInstruction(1141, regmem64, uimm8, none, "C1/4ib", {}, {cpuAMD64});
EndMnemonic(opSAL, 1141);
StartMnemonic(opSAR, "SAR", 1142);
AddInstruction(1142, regmem8, one, none, "D0/7", {}, {cpu8086});
AddInstruction(1143, regmem8, CL, none, "D2/7", {}, {cpu8086});
AddInstruction(1144, regmem8, uimm8, none, "C0/7ib", {}, {cpu186});
AddInstruction(1145, regmem16, one, none, "D1/7", {optO16}, {cpu8086});
AddInstruction(1146, regmem16, CL, none, "D3/7", {optO16}, {cpu8086});
AddInstruction(1147, regmem16, uimm8, none, "C1/7ib", {optO16}, {cpu186});
AddInstruction(1148, regmem32, one, none, "D1/7", {optO32}, {cpu386});
AddInstruction(1149, regmem32, CL, none, "D3/7", {optO32}, {cpu386});
AddInstruction(1150, regmem32, uimm8, none, "C1/7ib", {optO32}, {cpu386});
AddInstruction(1151, regmem64, one, none, "D1/7", {}, {cpuAMD64});
AddInstruction(1152, regmem64, CL, none, "D3/7", {}, {cpuAMD64});
AddInstruction(1153, regmem64, uimm8, none, "C1/7ib", {}, {cpuAMD64});
EndMnemonic(opSAR, 1153);
StartMnemonic(opSBB, "SBB", 1154);
AddInstruction(1154, regmem8, reg8, none, "18/r", {}, {cpu8086});
AddInstruction(1155, regmem16, reg16, none, "19/r", {optO16}, {cpu8086});
AddInstruction(1156, regmem32, reg32, none, "19/r", {optO32}, {cpu386});
AddInstruction(1157, regmem64, reg64, none, "19/r", {}, {cpuAMD64});
AddInstruction(1158, reg8, regmem8, none, "1A/r", {}, {cpu8086});
AddInstruction(1159, reg16, regmem16, none, "1B/r", {optO16}, {cpu8086});
AddInstruction(1160, reg32, regmem32, none, "1B/r", {optO32}, {cpu386});
AddInstruction(1161, reg64, regmem64, none, "1B/r", {}, {cpuAMD64});
AddInstruction(1162, AL, uimm8, none, "1Cib", {}, {cpu8086});
AddInstruction(1163, AX, uimm16, none, "1Diw", {optO16}, {cpu8086});
AddInstruction(1164, EAX, uimm32, none, "1Did", {optO32}, {cpu386});
AddInstruction(1165, RAX, uimm32, none, "1Did", {}, {cpuAMD64});
AddInstruction(1166, regmem8, uimm8, none, "80/3ib", {}, {cpu8086});
AddInstruction(1167, regmem16, uimm16, none, "81/3iw", {optO16}, {cpu8086});
AddInstruction(1168, regmem32, uimm32, none, "81/3id", {optO32}, {cpu386});
AddInstruction(1169, regmem64, uimm32, none, "81/3id", {}, {cpuAMD64});
AddInstruction(1170, regmem16, simm8, none, "83/3ib", {optO16}, {cpu8086});
AddInstruction(1171, regmem32, simm8, none, "83/3ib", {optO32}, {cpu386});
AddInstruction(1172, regmem64, simm8, none, "83/3ib", {}, {cpuAMD64});
EndMnemonic(opSBB, 1172);
StartMnemonic(opSCAS, "SCAS", 1173);
AddInstruction(1173, mem8, none, none, "AE", {}, {cpu8086});
AddInstruction(1174, mem16, none, none, "AF", {optO16}, {cpu8086});
AddInstruction(1175, mem32, none, none, "AF", {optO32}, {cpu386});
AddInstruction(1176, mem64, none, none, "AF", {}, {cpuAMD64});
EndMnemonic(opSCAS, 1176);
StartMnemonic(opSCASB, "SCASB", 1177);
AddInstruction(1177, none, none, none, "AE", {}, {cpu8086});
EndMnemonic(opSCASB, 1177);
StartMnemonic(opSCASD, "SCASD", 1178);
AddInstruction(1178, none, none, none, "AF", {optO32}, {cpu386});
EndMnemonic(opSCASD, 1178);
StartMnemonic(opSCASQ, "SCASQ", 1179);
AddInstruction(1179, none, none, none, "AF", {}, {cpuAMD64});
EndMnemonic(opSCASQ, 1179);
StartMnemonic(opSCASW, "SCASW", 1180);
AddInstruction(1180, none, none, none, "AF", {optO16}, {cpu8086});
EndMnemonic(opSCASW, 1180);
StartMnemonic(opSETA, "SETA", 1181);
AddInstruction(1181, regmem8, none, none, "0F97/0", {}, {cpu386});
EndMnemonic(opSETA, 1181);
StartMnemonic(opSETAE, "SETAE", 1182);
AddInstruction(1182, regmem8, none, none, "0F93/0", {}, {cpu386});
EndMnemonic(opSETAE, 1182);
StartMnemonic(opSETB, "SETB", 1183);
AddInstruction(1183, regmem8, none, none, "0F92/0", {}, {cpu386});
EndMnemonic(opSETB, 1183);
StartMnemonic(opSETBE, "SETBE", 1184);
AddInstruction(1184, regmem8, none, none, "0F96/0", {}, {cpu386});
EndMnemonic(opSETBE, 1184);
StartMnemonic(opSETC, "SETC", 1185);
AddInstruction(1185, regmem8, none, none, "0F92/0", {}, {cpu386});
EndMnemonic(opSETC, 1185);
StartMnemonic(opSETE, "SETE", 1186);
AddInstruction(1186, regmem8, none, none, "0F94/0", {}, {cpu386});
EndMnemonic(opSETE, 1186);
StartMnemonic(opSETG, "SETG", 1187);
AddInstruction(1187, regmem8, none, none, "0F9F/0", {}, {cpu386});
EndMnemonic(opSETG, 1187);
StartMnemonic(opSETGE, "SETGE", 1188);
AddInstruction(1188, regmem8, none, none, "0F9D/0", {}, {cpu386});
EndMnemonic(opSETGE, 1188);
StartMnemonic(opSETL, "SETL", 1189);
AddInstruction(1189, regmem8, none, none, "0F9C/0", {}, {cpu386});
EndMnemonic(opSETL, 1189);
StartMnemonic(opSETLE, "SETLE", 1190);
AddInstruction(1190, regmem8, none, none, "0F9E/0", {}, {cpu386});
EndMnemonic(opSETLE, 1190);
StartMnemonic(opSETNA, "SETNA", 1191);
AddInstruction(1191, regmem8, none, none, "0F96/0", {}, {cpu386});
EndMnemonic(opSETNA, 1191);
StartMnemonic(opSETNAE, "SETNAE", 1192);
AddInstruction(1192, regmem8, none, none, "0F92/0", {}, {cpu386});
EndMnemonic(opSETNAE, 1192);
StartMnemonic(opSETNB, "SETNB", 1193);
AddInstruction(1193, regmem8, none, none, "0F93/0", {}, {cpu386});
EndMnemonic(opSETNB, 1193);
StartMnemonic(opSETNBE, "SETNBE", 1194);
AddInstruction(1194, regmem8, none, none, "0F97/0", {}, {cpu386});
EndMnemonic(opSETNBE, 1194);
StartMnemonic(opSETNC, "SETNC", 1195);
AddInstruction(1195, regmem8, none, none, "0F93/0", {}, {cpu386});
EndMnemonic(opSETNC, 1195);
StartMnemonic(opSETNE, "SETNE", 1196);
AddInstruction(1196, regmem8, none, none, "0F95/0", {}, {cpu386});
EndMnemonic(opSETNE, 1196);
StartMnemonic(opSETNG, "SETNG", 1197);
AddInstruction(1197, regmem8, none, none, "0F9E/0", {}, {cpu386});
EndMnemonic(opSETNG, 1197);
StartMnemonic(opSETNGE, "SETNGE", 1198);
AddInstruction(1198, regmem8, none, none, "0F9C/0", {}, {cpu386});
EndMnemonic(opSETNGE, 1198);
StartMnemonic(opSETNL, "SETNL", 1199);
AddInstruction(1199, regmem8, none, none, "0F9D/0", {}, {cpu386});
EndMnemonic(opSETNL, 1199);
StartMnemonic(opSETNLE, "SETNLE", 1200);
AddInstruction(1200, regmem8, none, none, "0F9F/0", {}, {cpu386});
EndMnemonic(opSETNLE, 1200);
StartMnemonic(opSETNO, "SETNO", 1201);
AddInstruction(1201, regmem8, none, none, "0F91/0", {}, {cpu386});
EndMnemonic(opSETNO, 1201);
StartMnemonic(opSETNP, "SETNP", 1202);
AddInstruction(1202, regmem8, none, none, "0F9B/0", {}, {cpu386});
EndMnemonic(opSETNP, 1202);
StartMnemonic(opSETNS, "SETNS", 1203);
AddInstruction(1203, regmem8, none, none, "0F99/0", {}, {cpu386});
EndMnemonic(opSETNS, 1203);
StartMnemonic(opSETNZ, "SETNZ", 1204);
AddInstruction(1204, regmem8, none, none, "0F95/0", {}, {cpu386});
EndMnemonic(opSETNZ, 1204);
StartMnemonic(opSETO, "SETO", 1205);
AddInstruction(1205, regmem8, none, none, "0F90/0", {}, {cpu386});
EndMnemonic(opSETO, 1205);
StartMnemonic(opSETP, "SETP", 1206);
AddInstruction(1206, regmem8, none, none, "0F9A/0", {}, {cpu386});
EndMnemonic(opSETP, 1206);
StartMnemonic(opSETPE, "SETPE", 1207);
AddInstruction(1207, regmem8, none, none, "0F9A/0", {}, {cpu386});
EndMnemonic(opSETPE, 1207);
StartMnemonic(opSETPO, "SETPO", 1208);
AddInstruction(1208, regmem8, none, none, "0F9B/0", {}, {cpu386});
EndMnemonic(opSETPO, 1208);
StartMnemonic(opSETS, "SETS", 1209);
AddInstruction(1209, regmem8, none, none, "0F98/0", {}, {cpu386});
EndMnemonic(opSETS, 1209);
StartMnemonic(opSETZ, "SETZ", 1210);
AddInstruction(1210, regmem8, none, none, "0F94/0", {}, {cpu386});
EndMnemonic(opSETZ, 1210);
StartMnemonic(opSFENCE, "SFENCE", 1211);
AddInstruction(1211, none, none, none, "0FAEF8", {}, {cpuSSE,cpuMMX});
EndMnemonic(opSFENCE, 1211);
StartMnemonic(opSGDT, "SGDT", 1212);
AddInstruction(1212, mem, none, none, "0F01/0", {}, {cpu286,cpuPrivileged});
AddInstruction(1213, mem, none, none, "0F01/0", {}, {cpuAMD64,cpuPrivileged});
EndMnemonic(opSGDT, 1213);
StartMnemonic(opSHL, "SHL", 1214);
AddInstruction(1214, regmem8, one, none, "D0/4", {}, {cpu8086});
AddInstruction(1215, regmem8, CL, none, "D2/4", {}, {cpu8086});
AddInstruction(1216, regmem8, uimm8, none, "C0/4ib", {}, {cpu186});
AddInstruction(1217, regmem16, one, none, "D1/4", {optO16}, {cpu8086});
AddInstruction(1218, regmem16, CL, none, "D3/4", {optO16}, {cpu8086});
AddInstruction(1219, regmem16, uimm8, none, "C1/4ib", {optO16}, {cpu186});
AddInstruction(1220, regmem32, one, none, "D1/4", {optO32}, {cpu386});
AddInstruction(1221, regmem32, CL, none, "D3/4", {optO32}, {cpu386});
AddInstruction(1222, regmem32, uimm8, none, "C1/4ib", {optO32}, {cpu386});
AddInstruction(1223, regmem64, one, none, "D1/4", {}, {cpuAMD64});
AddInstruction(1224, regmem64, CL, none, "D3/4", {}, {cpuAMD64});
AddInstruction(1225, regmem64, uimm8, none, "C1/4ib", {}, {cpuAMD64});
EndMnemonic(opSHL, 1225);
StartMnemonic(opSHLD, "SHLD", 1226);
AddInstruction(1226, regmem16, reg16, uimm8, "0FA4/rib", {optO16}, {cpu386});
AddInstruction(1227, regmem16, reg16, CL, "0FA5/r", {optO16}, {cpu386});
AddInstruction(1228, regmem32, reg32, uimm8, "0FA4/rib", {optO32}, {cpu386});
AddInstruction(1229, regmem32, reg32, CL, "0FA5/r", {optO32}, {cpu386});
AddInstruction(1230, regmem64, reg64, uimm8, "0FA4/rib", {}, {cpuAMD64});
AddInstruction(1231, regmem64, reg64, CL, "0FA5/r", {}, {cpuAMD64});
EndMnemonic(opSHLD, 1231);
StartMnemonic(opSHR, "SHR", 1232);
AddInstruction(1232, regmem8, one, none, "D0/5", {}, {cpu8086});
AddInstruction(1233, regmem8, CL, none, "D2/5", {}, {cpu8086});
AddInstruction(1234, regmem8, uimm8, none, "C0/5ib", {}, {cpu186});
AddInstruction(1235, regmem16, one, none, "D1/5", {optO16}, {cpu8086});
AddInstruction(1236, regmem16, CL, none, "D3/5", {optO16}, {cpu8086});
AddInstruction(1237, regmem16, uimm8, none, "C1/5ib", {optO16}, {cpu186});
AddInstruction(1238, regmem32, one, none, "D1/5", {optO32}, {cpu386});
AddInstruction(1239, regmem32, CL, none, "D3/5", {optO32}, {cpu386});
AddInstruction(1240, regmem32, uimm8, none, "C1/5ib", {optO32}, {cpu386});
AddInstruction(1241, regmem64, one, none, "D1/5", {}, {cpuAMD64});
AddInstruction(1242, regmem64, CL, none, "D3/5", {}, {cpuAMD64});
AddInstruction(1243, regmem64, uimm8, none, "C1/5ib", {}, {cpuAMD64});
EndMnemonic(opSHR, 1243);
StartMnemonic(opSHRD, "SHRD", 1244);
AddInstruction(1244, regmem16, reg16, uimm8, "0FAC/rib", {optO16}, {cpu386});
AddInstruction(1245, regmem16, reg16, CL, "0FAD/r", {optO16}, {cpu386});
AddInstruction(1246, regmem32, reg32, uimm8, "0FAC/rib", {optO32}, {cpu386});
AddInstruction(1247, regmem32, reg32, CL, "0FAD/r", {optO32}, {cpu386});
AddInstruction(1248, regmem64, reg64, uimm8, "0FAC/rib", {}, {cpuAMD64});
AddInstruction(1249, regmem64, reg64, CL, "0FAD/r", {}, {cpuAMD64});
EndMnemonic(opSHRD, 1249);
StartMnemonic(opSHUFPD, "SHUFPD", 1250);
AddInstruction(1250, xmm, xmmmem128, uimm8, "660FC6/rib", {}, {cpuSSE2});
EndMnemonic(opSHUFPD, 1250);
StartMnemonic(opSHUFPS, "SHUFPS", 1251);
AddInstruction(1251, xmm, xmmmem128, uimm8, "0FC6/rib", {}, {cpuSSE});
EndMnemonic(opSHUFPS, 1251);
StartMnemonic(opSIDT, "SIDT", 1252);
AddInstruction(1252, mem, none, none, "0F01/1", {}, {cpu286,cpuPrivileged});
AddInstruction(1253, mem, none, none, "0F01/1", {}, {cpuAMD64,cpuPrivileged});
EndMnemonic(opSIDT, 1253);
StartMnemonic(opSKINIT, "SKINIT", 1254);
AddInstruction(1254, EAX, none, none, "0F01DE", {}, {cpuAMD64});
EndMnemonic(opSKINIT, 1254);
StartMnemonic(opSLDT, "SLDT", 1255);
AddInstruction(1255, reg16, none, none, "0F00/0", {optO16}, {cpu286});
AddInstruction(1256, reg32, none, none, "0F00/0", {optO32}, {cpu386});
AddInstruction(1257, reg64, none, none, "0F00/0", {}, {cpuAMD64});
AddInstruction(1258, mem16, none, none, "0F00/0", {}, {cpu286});
EndMnemonic(opSLDT, 1258);
StartMnemonic(opSMSW, "SMSW", 1259);
AddInstruction(1259, reg16, none, none, "0F01/4", {optO16}, {cpu286});
AddInstruction(1260, reg32, none, none, "0F01/4", {optO32}, {cpu386});
AddInstruction(1261, reg64, none, none, "0F01/4", {}, {cpuAMD64});
AddInstruction(1262, mem16, none, none, "0F01/4", {}, {cpu286});
EndMnemonic(opSMSW, 1262);
StartMnemonic(opSQRTPD, "SQRTPD", 1263);
AddInstruction(1263, xmm, xmmmem128, none, "660F51/r", {}, {cpuSSE2});
EndMnemonic(opSQRTPD, 1263);
StartMnemonic(opSQRTPS, "SQRTPS", 1264);
AddInstruction(1264, xmm, xmmmem128, none, "0F51/r", {}, {cpuSSE});
EndMnemonic(opSQRTPS, 1264);
StartMnemonic(opSQRTSD, "SQRTSD", 1265);
AddInstruction(1265, xmm, xmmmem64, none, "F20F51/r", {}, {cpuSSE2});
EndMnemonic(opSQRTSD, 1265);
StartMnemonic(opSQRTSS, "SQRTSS", 1266);
AddInstruction(1266, xmm, xmmmem32, none, "F30F51/r", {}, {cpuSSE});
EndMnemonic(opSQRTSS, 1266);
StartMnemonic(opSTC, "STC", 1267);
AddInstruction(1267, none, none, none, "F9", {}, {cpu8086});
EndMnemonic(opSTC, 1267);
StartMnemonic(opSTD, "STD", 1268);
AddInstruction(1268, none, none, none, "FD", {}, {cpu8086});
EndMnemonic(opSTD, 1268);
StartMnemonic(opSTGI, "STGI", 1269);
AddInstruction(1269, none, none, none, "0F01DC", {}, {cpuPentium});
EndMnemonic(opSTGI, 1269);
StartMnemonic(opSTI, "STI", 1270);
AddInstruction(1270, none, none, none, "FB", {}, {cpu8086});
EndMnemonic(opSTI, 1270);
StartMnemonic(opSTMXCSR, "STMXCSR", 1271);
AddInstruction(1271, mem32, none, none, "0FAE/3", {}, {cpuSSE});
EndMnemonic(opSTMXCSR, 1271);
StartMnemonic(opSTOS, "STOS", 1272);
AddInstruction(1272, mem8, none, none, "AA", {}, {cpu8086});
AddInstruction(1273, mem16, none, none, "AB", {optO16}, {cpu8086});
AddInstruction(1274, mem32, none, none, "AB", {optO32}, {cpu386});
AddInstruction(1275, mem64, none, none, "AB", {}, {cpuAMD64});
EndMnemonic(opSTOS, 1275);
StartMnemonic(opSTOSB, "STOSB", 1276);
AddInstruction(1276, none, none, none, "AA", {}, {cpu8086});
EndMnemonic(opSTOSB, 1276);
StartMnemonic(opSTOSD, "STOSD", 1277);
AddInstruction(1277, none, none, none, "AB", {optO32}, {cpu386});
EndMnemonic(opSTOSD, 1277);
StartMnemonic(opSTOSQ, "STOSQ", 1278);
AddInstruction(1278, none, none, none, "AB", {}, {cpuAMD64});
EndMnemonic(opSTOSQ, 1278);
StartMnemonic(opSTOSW, "STOSW", 1279);
AddInstruction(1279, none, none, none, "AB", {optO16}, {cpu8086});
EndMnemonic(opSTOSW, 1279);
StartMnemonic(opSTR, "STR", 1280);
AddInstruction(1280, reg16, none, none, "0F00/1", {optO16}, {cpu286,cpuProtected});
AddInstruction(1281, reg32, none, none, "0F00/1", {optO32}, {cpu386,cpuProtected});
AddInstruction(1282, reg64, none, none, "0F00/1", {}, {cpuAMD64});
AddInstruction(1283, mem16, none, none, "0F00/1", {}, {cpu286,cpuProtected});
EndMnemonic(opSTR, 1283);
StartMnemonic(opSUB, "SUB", 1284);
AddInstruction(1284, regmem8, reg8, none, "28/r", {}, {cpu8086});
AddInstruction(1285, regmem16, reg16, none, "29/r", {optO16}, {cpu8086});
AddInstruction(1286, regmem32, reg32, none, "29/r", {optO32}, {cpu386});
AddInstruction(1287, regmem64, reg64, none, "29/r", {}, {cpuAMD64});
AddInstruction(1288, reg8, regmem8, none, "2A/r", {}, {cpu8086});
AddInstruction(1289, reg16, regmem16, none, "2B/r", {optO16}, {cpu8086});
AddInstruction(1290, reg32, regmem32, none, "2B/r", {optO32}, {cpu386});
AddInstruction(1291, reg64, regmem64, none, "2B/r", {}, {cpuAMD64});
AddInstruction(1292, AL, imm8, none, "2Cib", {}, {cpu8086});
AddInstruction(1293, AX, imm16, none, "2Diw", {optO16}, {cpu8086});
AddInstruction(1294, EAX, imm32, none, "2Did", {optO32}, {cpu386});
AddInstruction(1295, RAX, imm32, none, "2Did", {}, {cpuAMD64});
AddInstruction(1296, regmem8, imm8, none, "80/5ib", {}, {cpu8086});
AddInstruction(1297, regmem16, imm16, none, "81/5iw", {optO16}, {cpu8086});
AddInstruction(1298, regmem32, imm32, none, "81/5id", {optO32}, {cpu386});
AddInstruction(1299, regmem64, imm32, none, "81/5id", {}, {cpuAMD64});
AddInstruction(1300, regmem16, simm8, none, "83/5ib", {optO16}, {cpu8086});
AddInstruction(1301, regmem32, simm8, none, "83/5ib", {optO32}, {cpu386});
AddInstruction(1302, regmem64, simm8, none, "83/5ib", {}, {cpuAMD64});
EndMnemonic(opSUB, 1302);
StartMnemonic(opSUBPD, "SUBPD", 1303);
AddInstruction(1303, xmm, xmmmem128, none, "660F5C/r", {}, {cpuSSE2});
EndMnemonic(opSUBPD, 1303);
StartMnemonic(opSUBPS, "SUBPS", 1304);
AddInstruction(1304, xmm, xmmmem128, none, "0F5C/r", {}, {cpuSSE});
EndMnemonic(opSUBPS, 1304);
StartMnemonic(opSUBSD, "SUBSD", 1305);
AddInstruction(1305, xmm, xmmmem64, none, "F20F5C/r", {}, {cpuSSE2});
EndMnemonic(opSUBSD, 1305);
StartMnemonic(opSUBSS, "SUBSS", 1306);
AddInstruction(1306, xmm, xmmmem32, none, "F30F5C/r", {}, {cpuSSE});
EndMnemonic(opSUBSS, 1306);
StartMnemonic(opSWAPGS, "SWAPGS", 1307);
AddInstruction(1307, none, none, none, "0F01F8", {}, {cpuAMD64});
EndMnemonic(opSWAPGS, 1307);
StartMnemonic(opSYSCALL, "SYSCALL", 1308);
AddInstruction(1308, none, none, none, "0F05", {}, {cpuP6});
EndMnemonic(opSYSCALL, 1308);
StartMnemonic(opSYSENTER, "SYSENTER", 1309);
AddInstruction(1309, none, none, none, "0F34", {optNot64}, {cpuP6});
EndMnemonic(opSYSENTER, 1309);
StartMnemonic(opSYSEXIT, "SYSEXIT", 1310);
AddInstruction(1310, none, none, none, "0F35", {optNot64}, {cpuP6,cpuPrivileged});
EndMnemonic(opSYSEXIT, 1310);
StartMnemonic(opSYSRET, "SYSRET", 1311);
AddInstruction(1311, none, none, none, "0F07", {}, {cpuP6,cpuPrivileged});
EndMnemonic(opSYSRET, 1311);
StartMnemonic(opTEST, "TEST", 1312);
AddInstruction(1312, regmem8, reg8, none, "84/r", {}, {cpu8086});
AddInstruction(1313, regmem16, reg16, none, "85/r", {optO16}, {cpu8086});
AddInstruction(1314, regmem32, reg32, none, "85/r", {optO32}, {cpu386});
AddInstruction(1315, regmem64, reg64, none, "85/r", {}, {cpuAMD64});
AddInstruction(1316, AL, imm8, none, "A8ib", {}, {cpu8086});
AddInstruction(1317, AX, imm16, none, "A9iw", {optO16}, {cpu8086});
AddInstruction(1318, EAX, imm32, none, "A9id", {optO32}, {cpu386});
AddInstruction(1319, RAX, imm32, none, "A9id", {}, {cpuAMD64});
AddInstruction(1320, regmem8, imm8, none, "F6/0ib", {}, {cpu8086});
AddInstruction(1321, regmem16, imm16, none, "F7/0iw", {optO16}, {cpu8086});
AddInstruction(1322, regmem32, imm32, none, "F7/0id", {optO32}, {cpu386});
AddInstruction(1323, regmem64, imm32, none, "F7/0id", {}, {cpuAMD64});
EndMnemonic(opTEST, 1323);
StartMnemonic(opUCOMISD, "UCOMISD", 1324);
AddInstruction(1324, xmm, xmmmem64, none, "660F2E/r", {}, {cpuSSE2});
EndMnemonic(opUCOMISD, 1324);
StartMnemonic(opUCOMISS, "UCOMISS", 1325);
AddInstruction(1325, xmm, xmmmem32, none, "0F2E/r", {}, {cpuSSE});
EndMnemonic(opUCOMISS, 1325);
StartMnemonic(opUD2, "UD2", 1326);
AddInstruction(1326, none, none, none, "0F0B", {}, {cpu286});
EndMnemonic(opUD2, 1326);
StartMnemonic(opUNPCKHPD, "UNPCKHPD", 1327);
AddInstruction(1327, xmm, xmmmem128, none, "660F15/r", {}, {cpuSSE2});
EndMnemonic(opUNPCKHPD, 1327);
StartMnemonic(opUNPCKHPS, "UNPCKHPS", 1328);
AddInstruction(1328, xmm, xmmmem128, none, "0F15/r", {}, {cpuSSE});
EndMnemonic(opUNPCKHPS, 1328);
StartMnemonic(opUNPCKLPD, "UNPCKLPD", 1329);
AddInstruction(1329, xmm, xmmmem128, none, "660F14/r", {}, {cpuSSE2});
EndMnemonic(opUNPCKLPD, 1329);
StartMnemonic(opUNPCKLPS, "UNPCKLPS", 1330);
AddInstruction(1330, xmm, xmmmem128, none, "0F14/r", {}, {cpuSSE});
EndMnemonic(opUNPCKLPS, 1330);
StartMnemonic(opVERR, "VERR", 1331);
AddInstruction(1331, regmem16, none, none, "0F00/4", {}, {cpu286,cpuPrivileged});
EndMnemonic(opVERR, 1331);
StartMnemonic(opVERW, "VERW", 1332);
AddInstruction(1332, regmem16, none, none, "0F00/5", {}, {cpu286,cpuPrivileged});
EndMnemonic(opVERW, 1332);
StartMnemonic(opVMLOAD, "VMLOAD", 1333);
AddInstruction(1333, rAX, none, none, "0F01DA", {}, {cpuAMD64});
EndMnemonic(opVMLOAD, 1333);
StartMnemonic(opVMMCALL, "VMMCALL", 1334);
AddInstruction(1334, none, none, none, "0F01D9", {}, {cpuAMD64});
EndMnemonic(opVMMCALL, 1334);
StartMnemonic(opVMRUN, "VMRUN", 1335);
AddInstruction(1335, rAX, none, none, "0F01D8", {}, {cpuAMD64});
EndMnemonic(opVMRUN, 1335);
StartMnemonic(opVMSAVE, "VMSAVE", 1336);
AddInstruction(1336, rAX, none, none, "0F01DB", {}, {cpuAMD64});
EndMnemonic(opVMSAVE, 1336);
StartMnemonic(opWBINVD, "WBINVD", 1337);
AddInstruction(1337, none, none, none, "0F09", {}, {cpu486,cpuPrivileged});
EndMnemonic(opWBINVD, 1337);
StartMnemonic(opWRMSR, "WRMSR", 1338);
AddInstruction(1338, none, none, none, "0F30", {}, {cpuPentium,cpuPrivileged});
EndMnemonic(opWRMSR, 1338);
StartMnemonic(opXADD, "XADD", 1339);
AddInstruction(1339, regmem8, reg8, none, "0FC0/r", {}, {cpu486});
AddInstruction(1340, regmem16, reg16, none, "0FC1/r", {optO16}, {cpu486});
AddInstruction(1341, regmem32, reg32, none, "0FC1/r", {optO32}, {cpu486});
AddInstruction(1342, regmem64, reg64, none, "0FC1/r", {}, {cpuAMD64});
EndMnemonic(opXADD, 1342);
StartMnemonic(opXCHG, "XCHG", 1343);
AddInstruction(1343, AX, reg16, none, "90rw", {optO16}, {cpu8086});
AddInstruction(1344, reg16, AX, none, "90rw", {optO16}, {cpu8086});
AddInstruction(1345, EAX, reg32, none, "90rd", {optO32}, {cpu386});
AddInstruction(1346, reg32, EAX, none, "90rd", {optO32}, {cpu386});
AddInstruction(1347, RAX, reg64, none, "90rq", {}, {cpuAMD64});
AddInstruction(1348, reg64, RAX, none, "90rq", {}, {cpuAMD64});
AddInstruction(1349, regmem8, reg8, none, "86/r", {}, {cpu8086});
AddInstruction(1350, reg8, regmem8, none, "86/r", {}, {cpu8086});
AddInstruction(1351, regmem16, reg16, none, "87/r", {optO16}, {cpu8086});
AddInstruction(1352, reg16, regmem16, none, "87/r", {optO16}, {cpu8086});
AddInstruction(1353, regmem32, reg32, none, "87/r", {optO32}, {cpu386});
AddInstruction(1354, reg32, regmem32, none, "87/r", {optO32}, {cpu386});
AddInstruction(1355, regmem64, reg64, none, "87/r", {}, {cpuAMD64});
AddInstruction(1356, reg64, regmem64, none, "87/r", {}, {cpuAMD64});
EndMnemonic(opXCHG, 1356);
StartMnemonic(opXLAT, "XLAT", 1357);
AddInstruction(1357, mem8, none, none, "D7", {}, {cpu8086});
EndMnemonic(opXLAT, 1357);
StartMnemonic(opXLATB, "XLATB", 1358);
AddInstruction(1358, none, none, none, "D7", {}, {cpu8086});
EndMnemonic(opXLATB, 1358);
StartMnemonic(opXOR, "XOR", 1359);
AddInstruction(1359, regmem8, reg8, none, "30/r", {}, {cpu8086});
AddInstruction(1360, regmem16, reg16, none, "31/r", {optO16}, {cpu8086});
AddInstruction(1361, regmem32, reg32, none, "31/r", {optO32}, {cpu386});
AddInstruction(1362, regmem64, reg64, none, "31/r", {}, {cpuAMD64});
AddInstruction(1363, reg8, regmem8, none, "32/r", {}, {cpu8086});
AddInstruction(1364, reg16, regmem16, none, "33/r", {optO16}, {cpu8086});
AddInstruction(1365, reg32, regmem32, none, "33/r", {optO32}, {cpu386});
AddInstruction(1366, reg64, regmem64, none, "33/r", {}, {cpuAMD64});
AddInstruction(1367, AL, imm8, none, "34ib", {}, {cpu8086});
AddInstruction(1368, AX, imm16, none, "35iw", {optO16}, {cpu8086});
AddInstruction(1369, EAX, imm32, none, "35id", {optO32}, {cpu386});
AddInstruction(1370, RAX, imm32, none, "35id", {}, {cpuAMD64});
AddInstruction(1371, regmem8, imm8, none, "80/6ib", {}, {cpu8086});
AddInstruction(1372, regmem16, imm16, none, "81/6iw", {optO16}, {cpu8086});
AddInstruction(1373, regmem32, imm32, none, "81/6id", {optO32}, {cpu386});
AddInstruction(1374,