MODULE ASMAMD64;
CONST
maxMnemonicNameLength = 12;
maxMnemonics = 600;
maxInstructions = 1400;
maxRegisters = 150;
maxCPUs = 30;
maxOperands* = 3;
none* = -1;
cpu8086* = 0;
cpu186* = 1;
cpu286* = 2;
cpu386* = 3;
cpu486* = 4;
cpuPentium* = 5;
cpuP6* = 6;
cpuKatmai* = 7;
cpuWillamette* = 8;
cpuPrescott* = 9;
cpuAMD64* = 10;
cpuPrivileged* = 20;
cpuProtected* = 21;
cpuSSE* = 22;
cpuSSE2* = 23;
cpuSSE3* = 24;
cpu3DNow* = 25;
cpuMMX* = 26;
cpuFPU* = 27;
cpuOptions* = {cpuPrivileged .. cpuFPU};
optO16* = 0;
optO32* = 1;
optO64* = 2;
optD64* = 3;
optI64* = 4;
optA16* = 5;
optA32* = 6;
optPOP* = 7;
optPLOCK* = 8;
optPREP* = 9;
optPREPN* = 10;
AL* = 0;
AX* = 1;
CL* = 2;
CR8* = 3;
CRn* = 4;
CS* = 5;
DRn* = 6;
DS* = 7;
DX* = 8;
EAX* = 9;
ECX* = 10;
ES* = 11;
FS* = 12;
GS* = 13;
RAX* = 14;
SS* = 15;
imm16* = 16;
imm32* = 17;
imm64* = 18;
imm8* = 19;
mem* = 20;
mem128* = 21;
mem16* = 22;
mem32* = 23;
mem64* = 24;
mem8* = 25;
mmx* = 26;
mmxmem32* = 27;
mmxmem64* = 28;
moffset16* = 29;
moffset32* = 30;
moffset64* = 31;
moffset8* = 32;
one* = 33;
pntr1616* = 34;
pntr1632* = 35;
rAX* = 36;
reg16* = 37;
reg32* = 38;
reg64* = 39;
reg8* = 40;
regmem16* = 41;
regmem32* = 42;
regmem64* = 43;
regmem8* = 44;
rel16off* = 45;
rel32off* = 46;
rel8off* = 47;
segReg* = 48;
simm16* = 49;
simm32* = 50;
simm8* = 51;
st0* = 52;
sti* = 53;
three* = 54;
uimm16* = 55;
uimm32* = 56;
uimm8* = 57;
xmm* = 58;
xmmmem128* = 59;
xmmmem32* = 60;
xmmmem64* = 61;
prfOP* = 066H;
prfADR* = 067H;
prfCS* = 02EH;
prfDS* = 03EH;
prfES* = 026H;
prfFS* = 064H;
prfGS* = 065H;
prfSS* = 036H;
prfLOCK* = 0F0H;
prfREP* = 0F3H;
prfREPE* = 0F3H;
prfREPZ* = 0F3H;
prfREPNE* = 0F2H;
prfREPNZ* = 0F2H;
opAAA = 0;
opAAD = 1;
opAAM = 2;
opAAS = 3;
opADC = 4;
opADD* = 5;
opADDPD = 6;
opADDPS = 7;
opADDSD* = 8;
opADDSS* = 9;
opADDSUBPD = 10;
opADDSUBPS = 11;
opAND* = 12;
opANDNPD = 13;
opANDNPS = 14;
opANDPD* = 15;
opANDPS* = 16;
opARPL = 17;
opBOUND = 18;
opBSF = 19;
opBSR = 20;
opBSWAP = 21;
opBT* = 22;
opBTC = 23;
opBTR* = 24;
opBTS* = 25;
opCALL* = 26;
opCBW* = 27;
opCDQ* = 28;
opCDQE = 29;
opCFLUSH = 30;
opCLC = 31;
opCLD* = 32;
opCLGI = 33;
opCLI = 34;
opCLTS = 35;
opCMC = 36;
opCMOVA = 37;
opCMOVAE = 38;
opCMOVB = 39;
opCMOVBE = 40;
opCMOVC = 41;
opCMOVE = 42;
opCMOVG = 43;
opCMOVGE = 44;
opCMOVL = 45;
opCMOVLE = 46;
opCMOVNA = 47;
opCMOVNAE = 48;
opCMOVNB = 49;
opCMOVNBE = 50;
opCMOVNC = 51;
opCMOVNE = 52;
opCMOVNG = 53;
opCMOVNGE = 54;
opCMOVNL = 55;
opCMOVNLE = 56;
opCMOVNO = 57;
opCMOVNP = 58;
opCMOVNS = 59;
opCMOVNZ = 60;
opCMOVO = 61;
opCMOVP = 62;
opCMOVPE = 63;
opCMOVPO = 64;
opCMOVS = 65;
opCMOVZ = 66;
opCMP* = 67;
opCMPPD = 68;
opCMPPS = 69;
opCMPS = 70;
opCMPSB = 71;
opCMPSD = 72;
opCMPSQ = 73;
opCMPSS = 74;
opCMPSW = 75;
opCMPXCHG = 76;
opCMPXCHG16B = 77;
opCMPXCHG8B = 78;
opCOMISD* = 79;
opCOMISS* = 80;
opCPUID = 81;
opCQO* = 82;
opCVTDQ2PD = 83;
opCVTDQ2PS = 84;
opCVTPD2DQ = 85;
opCVTPD2PI = 86;
opCVTPD2PS = 87;
opCVTPI2PD = 88;
opCVTPI2PS = 89;
opCVTPS2DQ = 90;
opCVTPS2PD = 91;
opCVTPS2PI = 92;
opCVTSD2SI* = 93;
opCVTSD2SS* = 94;
opCVTSI2SD* = 95;
opCVTSI2SS* = 96;
opCVTSS2SD* = 97;
opCVTSS2SI* = 98;
opCVTTPD2DQ = 99;
opCVTTPD2PI = 100;
opCVTTPS2DQ = 101;
opCVTTPS2PI = 102;
opCVTTSD2SI = 103;
opCVTTSS2SI = 104;
opCWD* = 105;
opCWDE = 106;
opDAA = 107;
opDAS = 108;
opDEC* = 109;
opDIV = 110;
opDIVPD = 111;
opDIVPS = 112;
opDIVSD* = 113;
opDIVSS* = 114;
opEMMS = 115;
opENTER* = 116;
opF2XM1 = 117;
opFABS = 118;
opFADD = 119;
opFADDP = 120;
opFBLD = 121;
opFBSTP = 122;
opFCHS = 123;
opFCLEX = 124;
opFCMOVB = 125;
opFCMOVBE = 126;
opFCMOVE = 127;
opFCMOVNB = 128;
opFCMOVNBE = 129;
opFCMOVNE = 130;
opFCMOVNU = 131;
opFCMOVU = 132;
opFCOM = 133;
opFCOMI = 134;
opFCOMIP = 135;
opFCOMP = 136;
opFCOMPP = 137;
opFCOS = 138;
opFDECSTP = 139;
opFDIV = 140;
opFDIVP = 141;
opFDIVR = 142;
opFDIVRP = 143;
opFEMMS = 144;
opFFREE = 145;
opFIADD = 146;
opFICOM = 147;
opFICOMP = 148;
opFIDIV = 149;
opFIDIVR = 150;
opFILD = 151;
opFIMUL = 152;
opFINCSTP = 153;
opFINIT = 154;
opFIST = 155;
opFISTP = 156;
opFISTTP = 157;
opFISUB = 158;
opFISUBR = 159;
opFLD = 160;
opFLD1 = 161;
opFLDCW = 162;
opFLDENV = 163;
opFLDL2E = 164;
opFLDL2T = 165;
opFLDLG2 = 166;
opFLDLN2 = 167;
opFLDPI = 168;
opFLDZ = 169;
opFMUL = 170;
opFMULP = 171;
opFNCLEX = 172;
opFNINIT = 173;
opFNOP = 174;
opFNSAVE = 175;
opFNSTCW = 176;
opFNSTENV = 177;
opFNSTSW = 178;
opFPATAN = 179;
opFPREM = 180;
opFPREM1 = 181;
opFPTAN = 182;
opFRNDINT = 183;
opFRSTOR = 184;
opFSAVE = 185;
opFSCALE = 186;
opFSIN = 187;
opFSINCOS = 188;
opFSQRT = 189;
opFST = 190;
opFSTCW = 191;
opFSTENV = 192;
opFSTP = 193;
opFSTSW = 194;
opFSUB = 195;
opFSUBP = 196;
opFSUBR = 197;
opFSUBRP = 198;
opFTST = 199;
opFUCOM = 200;
opFUCOMI = 201;
opFUCOMIP = 202;
opFUCOMP = 203;
opFUCOMPP = 204;
opFWAIT = 205;
opFXAM = 206;
opFXCH = 207;
opFXRSTOR = 208;
opFXSAVE = 209;
opFXTRACT = 210;
opFYL2X = 211;
opFYL2XP1 = 212;
opHADDPD = 213;
opHADDPS = 214;
opHLT = 215;
opHSUBPD = 216;
opHSUBPS = 217;
opIDIV* = 218;
opIMUL* = 219;
opIN* = 220;
opINC* = 221;
opINS = 222;
opINSB = 223;
opINSD = 224;
opINSW = 225;
opINT* = 226;
opINT3* = 227;
opINTO = 228;
opINVD = 229;
opINVLPG = 230;
opINVLPGA = 231;
opIRET = 232;
opIRETD = 233;
opIRETQ = 234;
opJA* = 235;
opJAE* = 236;
opJB* = 237;
opJBE* = 238;
opJC* = 239;
opJCXZ = 240;
opJE* = 241;
opJECXZ = 242;
opJG* = 243;
opJGE* = 244;
opJL* = 245;
opJLE* = 246;
opJMP* = 247;
opJNA = 248;
opJNAE = 249;
opJNB = 250;
opJNBE = 251;
opJNC* = 252;
opJNE* = 253;
opJNG = 254;
opJNGE = 255;
opJNL = 256;
opJNLE = 257;
opJNO = 258;
opJNP = 259;
opJNS = 260;
opJNZ* = 261;
opJO = 262;
opJP = 263;
opJPE = 264;
opJPO = 265;
opJRCXZ = 266;
opJS = 267;
opJZ = 268;
opLAHF = 269;
opLAR = 270;
opLDDQU = 271;
opLDMXCSR = 272;
opLDS = 273;
opLEA = 274;
opLEAVE* = 275;
opLES = 276;
opLFENCE = 277;
opLFS = 278;
opLGDT = 279;
opLGS = 280;
opLIDT = 281;
opLLDT = 282;
opLMSW = 283;
opLODS = 284;
opLODSB = 285;
opLODSD = 286;
opLODSQ = 287;
opLODSW = 288;
opLOOP = 289;
opLOOPE = 290;
opLOOPNE = 291;
opLOOPNZ = 292;
opLOOPZ = 293;
opLSL = 294;
opLSS = 295;
opLTR = 296;
opMASKMOVDQU = 297;
opMASKMOVQ = 298;
opMAXPD = 299;
opMAXPS = 300;
opMAXSD = 301;
opMAXSS = 302;
opMFENCE = 303;
opMINPD = 304;
opMINPS = 305;
opMINSD = 306;
opMINSS = 307;
opMOV* = 308;
opMOVAPD = 309;
opMOVAPS = 310;
opMOVD* = 311;
opMOVDDUP = 312;
opMOVDQ2Q = 313;
opMOVDQA = 314;
opMOVDQU = 315;
opMOVHLPS = 316;
opMOVHPD = 317;
opMOVHPS = 318;
opMOVLHPS = 319;
opMOVLPD = 320;
opMOVLPS = 321;
opMOVMSKPD = 322;
opMOVMSKPS = 323;
opMOVNTDQ = 324;
opMOVNTI = 325;
opMOVNTPD = 326;
opMOVNTPS = 327;
opMOVNTQ = 328;
opMOVQ = 329;
opMOVQ2DQ = 330;
opMOVS = 331;
opMOVSB* = 332;
opMOVSD* = 333;
opMOVSHDUP = 334;
opMOVSLDUP = 335;
opMOVSQ = 336;
opMOVSS* = 337;
opMOVSW = 338;
opMOVSX* = 339;
opMOVSXD* = 340;
opMOVUPD = 341;
opMOVUPS = 342;
opMOVZX* = 343;
opMUL* = 344;
opMULPD = 345;
opMULPS = 346;
opMULSD* = 347;
opMULSS* = 348;
opNEG* = 349;
opNOP* = 350;
opNOT* = 351;
opOR* = 352;
opORPD = 353;
opORPS = 354;
opOUT* = 355;
opOUTS = 356;
opOUTSB = 357;
opOUTSD = 358;
opOUTSW = 359;
opPACKSSDW = 360;
opPACKSSWB = 361;
opPACKUSWB = 362;
opPADDB = 363;
opPADDD = 364;
opPADDQ = 365;
opPADDSB = 366;
opPADDSW = 367;
opPADDUSB = 368;
opPADDUSW = 369;
opPADDW = 370;
opPAND = 371;
opPANDN = 372;
opPAUSE = 373;
opPAVGB = 374;
opPAVGUSB = 375;
opPAVGW = 376;
opPCMPEQB = 377;
opPCMPEQD = 378;
opPCMPEQW = 379;
opPCMPGTB = 380;
opPCMPGTD = 381;
opPCMPGTW = 382;
opPEXTRW = 383;
opPF2ID = 384;
opPF2IW = 385;
opPFACC = 386;
opPFADD = 387;
opPFCMPEQ = 388;
opPFCMPGE = 389;
opPFCMPGT = 390;
opPFMAX = 391;
opPFMIN = 392;
opPFMUL = 393;
opPFNACC = 394;
opPFPNACC = 395;
opPFRCP = 396;
opPFRCPIT1 = 397;
opPFRCPIT2 = 398;
opPFRSQIT1 = 399;
opPFRSQRT = 400;
opPFSUB = 401;
opPFSUBR = 402;
opPI2FD = 403;
opPI2FW = 404;
opPINSRW = 405;
opPMADDWD = 406;
opPMAXSW = 407;
opPMAXUB = 408;
opPMINSW = 409;
opPMINUB = 410;
opPMOVMSKB = 411;
opPMULHRW = 412;
opPMULHUW = 413;
opPMULHW = 414;
opPMULLW = 415;
opPMULUDQ = 416;
opPOP* = 417;
opPOPA = 418;
opPOPAD = 419;
opPOPAW = 420;
opPOPF = 421;
opPOPFD = 422;
opPOPFQ = 423;
opPOPFW = 424;
opPOR = 425;
opPREFETCH = 426;
opPREFETCHNTA = 427;
opPREFETCHT0 = 428;
opPREFETCHT1 = 429;
opPREFETCHT2 = 430;
opPREFETCHW = 431;
opPSADBW = 432;
opPSHUFD = 433;
opPSHUFHW = 434;
opPSHUFLW = 435;
opPSHUFW = 436;
opPSLLD = 437;
opPSLLDQ = 438;
opPSLLQ = 439;
opPSLLW = 440;
opPSRAD = 441;
opPSRAW = 442;
opPSRLD = 443;
opPSRLDQ = 444;
opPSRLQ = 445;
opPSRLW = 446;
opPSUBB = 447;
opPSUBD = 448;
opPSUBQ = 449;
opPSUBSB = 450;
opPSUBSW = 451;
opPSUBUSB = 452;
opPSUBUSW = 453;
opPSUBW = 454;
opPSWAPD = 455;
opPUNPCKHBW = 456;
opPUNPCKHDQ = 457;
opPUNPCKHQDQ = 458;
opPUNPCKHWD = 459;
opPUNPCKLBW = 460;
opPUNPCKLDQ = 461;
opPUNPCKLQDQ = 462;
opPUNPCKLWD = 463;
opPUSH* = 464;
opPUSHA = 465;
opPUSHAD = 466;
opPUSHF = 467;
opPUSHFD = 468;
opPUSHFQ = 469;
opPUSHFW = 470;
opPXOR = 471;
opRCL = 472;
opRCPPS = 473;
opRCPSS = 474;
opRCR = 475;
opRDMSR = 476;
opRDPMC = 477;
opRDTSC = 478;
opRDTSCP = 479;
opRET* = 480;
opRETF = 481;
opROL* = 482;
opROR* = 483;
opRSM = 484;
opRSQRTPS = 485;
opRSQRTSS = 486;
opSAHF = 487;
opSAL* = 488;
opSAR* = 489;
opSBB* = 490;
opSCAS = 491;
opSCASB = 492;
opSCASD = 493;
opSCASQ = 494;
opSCASW = 495;
opSETA* = 496;
opSETAE* = 497;
opSETB* = 498;
opSETBE* = 499;
opSETC* = 500;
opSETE* = 501;
opSETG* = 502;
opSETGE* = 503;
opSETL* = 504;
opSETLE* = 505;
opSETNA = 506;
opSETNAE = 507;
opSETNB = 508;
opSETNBE = 509;
opSETNC* = 510;
opSETNE* = 511;
opSETNG = 512;
opSETNGE = 513;
opSETNL = 514;
opSETNLE = 515;
opSETNO = 516;
opSETNP = 517;
opSETNS = 518;
opSETNZ = 519;
opSETO = 520;
opSETP = 521;
opSETPE = 522;
opSETPO = 523;
opSETS = 524;
opSETZ = 525;
opSFENCE = 526;
opSGDT = 527;
opSHL* = 528;
opSHLD = 529;
opSHR* = 530;
opSHRD = 531;
opSHUFPD = 532;
opSHUFPS = 533;
opSIDT = 534;
opSKINIT = 535;
opSLDT = 536;
opSMSW = 537;
opSQRTPD = 538;
opSQRTPS = 539;
opSQRTSD = 540;
opSQRTSS = 541;
opSTC = 542;
opSTD* = 543;
opSTGI = 544;
opSTI = 545;
opSTMXCSR = 546;
opSTOS = 547;
opSTOSB = 548;
opSTOSD = 549;
opSTOSQ = 550;
opSTOSW = 551;
opSTR = 552;
opSUB* = 553;
opSUBPD = 554;
opSUBPS = 555;
opSUBSD* = 556;
opSUBSS* = 557;
opSWAPGS = 558;
opSYSCALL = 559;
opSYSENTER = 560;
opSYSEXIT = 561;
opSYSRET = 562;
opTEST = 563;
opUCOMISD = 564;
opUCOMISS = 565;
opUD2 = 566;
opUNPCKHPD = 567;
opUNPCKHPS = 568;
opUNPCKLPD = 569;
opUNPCKLPS = 570;
opVERR = 571;
opVERW = 572;
opVMLOAD = 573;
opVMMCALL = 574;
opVMRUN = 575;
opVMSAVE = 576;
opWBINVD = 577;
opWRMSR = 578;
opXADD = 579;
opXCHG = 580;
opXLAT = 581;
opXLATB = 582;
opXOR* = 583;
opXORPD* = 584;
opXORPS* = 585;
TYPE
Name = ARRAY 20 OF CHAR;
OperandType* = LONGINT;
CPUOptions* = SET;
Instruction = RECORD
cpuoptions-: CPUOptions;
options-: SET;
opcode-: ARRAY 9 OF CHAR;
operands-: ARRAY maxOperands OF OperandType;
opCount-: LONGINT;
END;
Mnemonic = RECORD
name-: ARRAY maxMnemonicNameLength OF CHAR;
firstInstr-, lastInstr-: LONGINT;
END;
CPUType = RECORD;
name-: Name;
cpuoptions-: CPUOptions;
END;
Register = RECORD;
name-: Name;
type-: OperandType;
index-: LONGINT;
END;
VAR
mnemonics-: ARRAY maxMnemonics OF Mnemonic;
mnemCount: LONGINT;
instructions-: ARRAY maxInstructions OF Instruction;
instrCount: LONGINT;
registers-: ARRAY maxRegisters OF Register;
regCount: LONGINT;
cpus-: ARRAY maxCPUs OF CPUType;
cpuCount: LONGINT;
PROCEDURE FindMnem* (CONST mnem: ARRAY OF CHAR): LONGINT;
VAR l, r, m: LONGINT;
BEGIN
l := 0;
r := mnemCount;
WHILE l # r DO
m := (l + r) DIV 2;
IF mnem < mnemonics[m].name THEN r := m;
ELSIF mnem > mnemonics[m].name THEN l := m + 1;
ELSE RETURN m;
END
END;
RETURN none;
END FindMnem;
PROCEDURE FindReg* (CONST reg: ARRAY OF CHAR): LONGINT;
VAR i: LONGINT;
BEGIN
FOR i := 0 TO regCount - 1 DO
IF registers[i].name = reg THEN RETURN i END;
END;
RETURN none;
END FindReg;
PROCEDURE FindCPU* (CONST cpu: ARRAY OF CHAR): LONGINT;
VAR i: LONGINT;
BEGIN
FOR i := 0 TO cpuCount - 1 DO
IF cpus[i].name = cpu THEN RETURN i END;
END;
RETURN none;
END FindCPU;
PROCEDURE Mnem (CONST name: ARRAY OF CHAR);
BEGIN
COPY (name, mnemonics[mnemCount].name);
mnemonics[mnemCount].firstInstr := instrCount;
INC (mnemCount);
END Mnem;
PROCEDURE Instr (op1, op2, op3: OperandType; CONST opcode: ARRAY OF CHAR; options: SET; cpuoptions: CPUOptions);
BEGIN
instructions[instrCount].operands[0] := op1;
instructions[instrCount].operands[1] := op2;
instructions[instrCount].operands[2] := op3;
COPY (opcode, instructions[instrCount].opcode);
instructions[instrCount].options := options;
instructions[instrCount].cpuoptions := cpuoptions;
IF op1 = none THEN
instructions[instrCount].opCount := 0;
ELSIF op2 = none THEN
instructions[instrCount].opCount := 1;
ELSIF op3 = none THEN
instructions[instrCount].opCount := 2;
ELSE
instructions[instrCount].opCount := 3;
END;
INC (instrCount);
mnemonics[mnemCount - 1].lastInstr := instrCount;
END Instr;
PROCEDURE Reg (CONST name: ARRAY OF CHAR; type: OperandType; index: LONGINT);
BEGIN
COPY (name, registers[regCount].name);
registers[regCount].type := type;
registers[regCount].index := index;
INC (regCount);
END Reg;
PROCEDURE Cpu (CONST name: ARRAY OF CHAR; cpuoptions: SET);
BEGIN
COPY (name, cpus[cpuCount].name);
cpus[cpuCount].cpuoptions := cpuoptions;
INC (cpuCount);
END Cpu;
BEGIN
mnemCount := 0; instrCount := 0;
regCount := 0; cpuCount := 0;
Mnem ("AAA");
Instr (none, none, none, "37", {optI64}, {cpu8086});
Mnem ("AAD");
Instr (none, none, none, "D50A", {optI64}, {cpu8086});
Instr (simm8, none, none, "D5ib", {optI64}, {cpu8086});
Mnem ("AAM");
Instr (none, none, none, "D40A", {optI64}, {cpu8086});
Instr (simm8, none, none, "D4ib", {optI64}, {cpu8086});
Mnem ("AAS");
Instr (none, none, none, "3F", {optI64}, {cpu8086});
Mnem ("ADC");
Instr (AL, imm8, none, "14ib", {}, {cpu8086});
Instr (AX, imm16, none, "15iw", {optO16}, {cpu8086});
Instr (EAX, imm32, none, "15id", {optO32}, {cpu386});
Instr (RAX, imm32, none, "15id", {}, {cpuAMD64});
Instr (regmem8, reg8, none, "10/r", {}, {cpu8086});
Instr (regmem16, reg16, none, "11/r", {optO16}, {cpu8086});
Instr (regmem32, reg32, none, "11/r", {optO32}, {cpu386});
Instr (regmem64, reg64, none, "11/r", {}, {cpuAMD64});
Instr (reg8, regmem8, none, "12/r", {}, {cpu8086});
Instr (reg16, regmem16, none, "13/r", {optO16}, {cpu8086});
Instr (reg32, regmem32, none, "13/r", {optO32}, {cpu386});
Instr (reg64, regmem64, none, "13/r", {}, {cpuAMD64});
Instr (regmem8, imm8, none, "80/2ib", {}, {cpu8086});
Instr (regmem16, simm8, none, "83/2ib", {optO16}, {cpu8086});
Instr (regmem16, imm16, none, "81/2iw", {optO16}, {cpu8086});
Instr (regmem32, simm8, none, "83/2ib", {optO32}, {cpu386});
Instr (regmem32, imm32, none, "81/2id", {optO32}, {cpu386});
Instr (regmem64, simm8, none, "83/2ib", {}, {cpuAMD64});
Instr (regmem64, imm32, none, "81/2id", {}, {cpuAMD64});
Mnem ("ADD");
Instr (AL, imm8, none, "04ib", {}, {cpu8086});
Instr (AX, imm16, none, "05iw", {optO16}, {cpu8086});
Instr (EAX, imm32, none, "05id", {optO32}, {cpu386});
Instr (RAX, imm32, none, "05id", {}, {cpuAMD64});
Instr (regmem8, reg8, none, "00/r", {}, {cpu8086});
Instr (regmem16, reg16, none, "01/r", {optO16}, {cpu8086});
Instr (regmem32, reg32, none, "01/r", {optO32}, {cpu386});
Instr (regmem64, reg64, none, "01/r", {}, {cpuAMD64});
Instr (reg8, regmem8, none, "02/r", {}, {cpu8086});
Instr (reg16, regmem16, none, "03/r", {optO16}, {cpu8086});
Instr (reg32, regmem32, none, "03/r", {optO32}, {cpu386});
Instr (reg64, regmem64, none, "03/r", {}, {cpuAMD64});
Instr (regmem8, imm8, none, "80/0ib", {}, {cpu8086});
Instr (regmem16, simm8, none, "83/0ib", {optO16}, {cpu8086});
Instr (regmem16, imm16, none, "81/0iw", {optO16}, {cpu8086});
Instr (regmem32, simm8, none, "83/0ib", {optO32}, {cpu386});
Instr (regmem32, imm32, none, "81/0id", {optO32}, {cpu386});
Instr (regmem64, simm8, none, "83/0ib", {}, {cpuAMD64});
Instr (regmem64, imm32, none, "81/0id", {}, {cpuAMD64});
Mnem ("ADDPD");
Instr (xmm, xmmmem128, none, "0F58/r", {optPOP}, {cpuWillamette, cpuSSE2});
Mnem ("ADDPS");
Instr (xmm, xmmmem128, none, "0F58/r", {}, {cpuKatmai, cpuSSE});
Mnem ("ADDSD");
Instr (xmm, xmmmem64, none, "0F58/r", {optPREPN}, {cpuWillamette, cpuSSE2});
Mnem ("ADDSS");
Instr (xmm, xmmmem32, none, "0F58/r", {optPREP}, {cpuKatmai, cpuSSE});
Mnem ("ADDSUBPD");
Instr (xmm, xmmmem128, none, "0FD0/r", {optPOP}, {cpuPrescott, cpuSSE3});
Mnem ("ADDSUBPS");
Instr (xmm, xmmmem128, none, "0FD0/r", {optPREPN}, {cpuPrescott, cpuSSE3});
Mnem ("AND");
Instr (AL, imm8, none, "24ib", {}, {cpu8086});
Instr (AX, imm16, none, "25iw", {optO16}, {cpu8086});
Instr (EAX, imm32, none, "25id", {optO32}, {cpu386});
Instr (RAX, imm32, none, "25id", {}, {cpuAMD64});
Instr (regmem8, reg8, none, "20/r", {}, {cpu8086});
Instr (regmem16, reg16, none, "21/r", {optO16}, {cpu8086});
Instr (regmem32, reg32, none, "21/r", {optO32}, {cpu386});
Instr (regmem64, reg64, none, "21/r", {}, {cpuAMD64});
Instr (reg8, regmem8, none, "22/r", {}, {cpu8086});
Instr (reg16, regmem16, none, "23/r", {optO16}, {cpu8086});
Instr (reg32, regmem32, none, "23/r", {optO32}, {cpu386});
Instr (reg64, regmem64, none, "23/r", {}, {cpuAMD64});
Instr (regmem8, imm8, none, "80/4ib", {}, {cpu8086});
Instr (regmem16, simm8, none, "83/4ib", {optO16}, {cpu8086});
Instr (regmem16, imm16, none, "81/4iw", {optO16}, {cpu8086});
Instr (regmem32, simm8, none, "83/4ib", {optO32}, {cpu386});
Instr (regmem32, imm32, none, "81/4id", {optO32}, {cpu386});
Instr (regmem64, simm8, none, "83/4ib", {}, {cpuAMD64});
Instr (regmem64, imm32, none, "81/4id", {}, {cpuAMD64});
Mnem ("ANDNPD");
Instr (xmm, xmmmem128, none, "0F55/r", {optPOP}, {cpuWillamette, cpuSSE2});
Mnem ("ANDNPS");
Instr (xmm, xmmmem128, none, "0F55/r", {}, {cpuKatmai, cpuSSE});
Mnem ("ANDPD");
Instr (xmm, xmmmem128, none, "0F54/r", {optPOP}, {cpuWillamette, cpuSSE2});
Mnem ("ANDPS");
Instr (xmm, xmmmem128, none, "0F54/r", {}, {cpuKatmai, cpuSSE});
Mnem ("ARPL");
Instr (regmem16, reg16, none, "63/r", {}, {cpu286, cpuPrivileged});
Mnem ("BOUND");
Instr (reg16, mem, none, "62/r", {optO16, optI64}, {cpu186});
Instr (reg32, mem, none, "62/r", {optO32, optI64}, {cpu386});
Mnem ("BSF");
Instr (reg16, regmem16, none, "0FBC/r", {optO16}, {cpu386});
Instr (reg32, regmem32, none, "0FBC/r", {optO32}, {cpu386});
Instr (reg64, regmem64, none, "0FBC/r", {}, {cpuAMD64});
Mnem ("BSR");
Instr (reg16, regmem16, none, "0FBD/r", {optO16}, {cpu386});
Instr (reg32, regmem32, none, "0FBD/r", {optO32}, {cpu386});
Instr (reg64, regmem64, none, "0FBD/r", {}, {cpuAMD64});
Mnem ("BSWAP");
Instr (reg32, none, none, "0FC8rd", {optO32}, {cpu486});
Instr (reg64, none, none, "0FC8rq", {}, {cpuAMD64});
Mnem ("BT");
Instr (regmem16, reg16, none, "0FA3/r", {optO16}, {cpu386});
Instr (regmem32, reg32, none, "0FA3/r", {optO32}, {cpu386});
Instr (regmem64, reg64, none, "0FA3/r", {}, {cpuAMD64});
Instr (regmem16, uimm8, none, "0FBA/4ib", {optO16}, {cpu386});
Instr (regmem32, uimm8, none, "0FBA/4ib", {optO32}, {cpu386});
Instr (regmem64, uimm8, none, "0FBA/4ib", {}, {cpuAMD64});
Mnem ("BTC");
Instr (regmem16, reg16, none, "0FBB/r", {optO16}, {cpu386});
Instr (regmem32, reg32, none, "0FBB/r", {optO32}, {cpu386});
Instr (regmem64, reg64, none, "0FBB/r", {}, {cpuAMD64});
Instr (regmem16, uimm8, none, "0FBA/7ib", {optO16}, {cpu386});
Instr (regmem32, uimm8, none, "0FBA/7ib", {optO32}, {cpu386});
Instr (regmem64, uimm8, none, "0FBA/7ib", {}, {cpuAMD64});
Mnem ("BTR");
Instr (regmem16, reg16, none, "0FB3/r", {optO16}, {cpu386});
Instr (regmem32, reg32, none, "0FB3/r", {optO32}, {cpu386});
Instr (regmem64, reg64, none, "0FB3/r", {}, {cpuAMD64});
Instr (regmem16, uimm8, none, "0FBA/6ib", {optO16}, {cpu386});
Instr (regmem32, uimm8, none, "0FBA/6ib", {optO32}, {cpu386});
Instr (regmem64, uimm8, none, "0FBA/6ib", {}, {cpuAMD64});
Mnem ("BTS");
Instr (regmem16, reg16, none, "0FAB/r", {optO16}, {cpu386});
Instr (regmem32, reg32, none, "0FAB/r", {optO32}, {cpu386});
Instr (regmem64, reg64, none, "0FAB/r", {}, {cpuAMD64});
Instr (regmem16, uimm8, none, "0FBA/5ib", {optO16}, {cpu386});
Instr (regmem32, uimm8, none, "0FBA/5ib", {optO32}, {cpu386});
Instr (regmem64, uimm8, none, "0FBA/5ib", {}, {cpuAMD64});
Mnem ("CALL");
Instr (rel16off, none, none, "E8cw", {}, {cpu8086});
Instr (rel32off, none, none, "E8cd", {}, {cpu8086});
Instr (regmem16, none, none, "FF/2", {optO16}, {cpu8086});
Instr (regmem32, none, none, "FF/2", {optO32, optI64}, {cpu386});
Instr (regmem64, none, none, "FF/2", {optD64}, {cpuAMD64});
Instr (mem, none, none, "FF/3", {optO16, optI64}, {cpu8086});
Instr (mem, none, none, "FF/3", {optO32, optI64}, {cpu386});
Instr (pntr1616, none, none, "9Aiwiw", {optI64}, {cpu8086});
Instr (pntr1632, none, none, "9Aidiw", {optI64}, {cpu386});
Mnem ("CBW");
Instr (none, none, none, "98", {optO16}, {cpu8086});
Mnem ("CDQ");
Instr (none, none, none, "99", {optO32}, {cpu386});
Mnem ("CDQE");
Instr (none, none, none, "98", {optO64}, {cpuAMD64});
Mnem ("CFLUSH");
Instr (mem8, none, none, "0FAE/7", {}, {cpuWillamette, cpuSSE2});
Mnem ("CLC");
Instr (none, none, none, "F8", {}, {cpu8086});
Mnem ("CLD");
Instr (none, none, none, "FC", {}, {cpu8086});
Mnem ("CLGI");
Instr (none, none, none, "0F01DD", {}, {cpuAMD64});
Mnem ("CLI");
Instr (none, none, none, "FA", {}, {cpu8086});
Mnem ("CLTS");
Instr (none, none, none, "0F06", {}, {cpu286, cpuPrivileged});
Mnem ("CMC");
Instr (none, none, none, "F5", {}, {cpu8086});
Mnem ("CMOVA");
Instr (reg16, regmem16, none, "0F47/r", {optO16}, {cpuP6});
Instr (reg32, regmem32, none, "0F47/r", {optO32}, {cpuP6});
Instr (reg64, regmem64, none, "0F47/r", {}, {cpuAMD64});
Mnem ("CMOVAE");
Instr (reg16, regmem16, none, "0F43/r", {optO16}, {cpuP6});
Instr (reg32, regmem32, none, "0F43/r", {optO32}, {cpuP6});
Instr (reg64, regmem64, none, "0F43/r", {}, {cpuAMD64});
Mnem ("CMOVB");
Instr (reg16, regmem16, none, "0F42/r", {optO16}, {cpuP6});
Instr (reg32, regmem32, none, "0F42/r", {optO32}, {cpuP6});
Instr (reg64, regmem64, none, "0F42/r", {}, {cpuAMD64});
Mnem ("CMOVBE");
Instr (reg16, regmem16, none, "0F46/r", {optO16}, {cpuP6});
Instr (reg32, regmem32, none, "0F46/r", {optO32}, {cpuP6});
Instr (reg64, regmem64, none, "0F46/r", {}, {cpuAMD64});
Mnem ("CMOVC");
Instr (reg16, regmem16, none, "0F42/r", {optO16}, {cpuP6});
Instr (reg32, regmem32, none, "0F42/r", {optO32}, {cpuP6});
Instr (reg64, regmem64, none, "0F42/r", {}, {cpuAMD64});
Mnem ("CMOVE");
Instr (reg16, regmem16, none, "0F44/r", {optO16}, {cpuP6});
Instr (reg32, regmem32, none, "0F44/r", {optO32}, {cpuP6});
Instr (reg64, regmem64, none, "0F44/r", {}, {cpuAMD64});
Mnem ("CMOVG");
Instr (reg16, regmem16, none, "0F4F/r", {optO16}, {cpuP6});
Instr (reg32, regmem32, none, "0F4F/r", {optO32}, {cpuP6});
Instr (reg64, regmem64, none, "0F4F/r", {}, {cpuAMD64});
Mnem ("CMOVGE");
Instr (reg16, regmem16, none, "0F4D/r", {optO16}, {cpuP6});
Instr (reg32, regmem32, none, "0F4D/r", {optO32}, {cpuP6});
Instr (reg64, regmem64, none, "0F4D/r", {}, {cpuAMD64});
Mnem ("CMOVL");
Instr (reg16, regmem16, none, "0F4C/r", {optO16}, {cpuP6});
Instr (reg32, regmem32, none, "0F4C/r", {optO32}, {cpuP6});
Instr (reg64, regmem64, none, "0F4C/r", {}, {cpuAMD64});
Mnem ("CMOVLE");
Instr (reg16, regmem16, none, "0F4E/r", {optO16}, {cpuP6});
Instr (reg32, regmem32, none, "0F4E/r", {optO32}, {cpuP6});
Instr (reg64, regmem64, none, "0F4E/r", {}, {cpuAMD64});
Mnem ("CMOVNA");
Instr (reg16, regmem16, none, "0F46/r", {optO16}, {cpuP6});
Instr (reg32, regmem32, none, "0F46/r", {optO32}, {cpuP6});
Instr (reg64, regmem64, none, "0F46/r", {}, {cpuAMD64});
Mnem ("CMOVNAE");
Instr (reg16, regmem16, none, "0F42/r", {optO16}, {cpuP6});
Instr (reg32, regmem32, none, "0F42/r", {optO32}, {cpuP6});
Instr (reg64, regmem64, none, "0F42/r", {}, {cpuAMD64});
Mnem ("CMOVNB");
Instr (reg16, regmem16, none, "0F43/r", {optO16}, {cpuP6});
Instr (reg32, regmem32, none, "0F43/r", {optO32}, {cpuP6});
Instr (reg64, regmem64, none, "0F43/r", {}, {cpuAMD64});
Mnem ("CMOVNBE");
Instr (reg16, regmem16, none, "0F47/r", {optO16}, {cpuP6});
Instr (reg32, regmem32, none, "0F47/r", {optO32}, {cpuP6});
Instr (reg64, regmem64, none, "0F47/r", {}, {cpuAMD64});
Mnem ("CMOVNC");
Instr (reg16, regmem16, none, "0F43/r", {optO16}, {cpuP6});
Instr (reg32, regmem32, none, "0F43/r", {optO32}, {cpuP6});
Instr (reg64, regmem64, none, "0F43/r", {}, {cpuAMD64});
Mnem ("CMOVNE");
Instr (reg16, regmem16, none, "0F45/r", {optO16}, {cpuP6});
Instr (reg32, regmem32, none, "0F45/r", {optO32}, {cpuP6});
Instr (reg64, regmem64, none, "0F45/r", {}, {cpuAMD64});
Mnem ("CMOVNG");
Instr (reg16, regmem16, none, "0F4E/r", {optO16}, {cpuP6});
Instr (reg32, regmem32, none, "0F4E/r", {optO32}, {cpuP6});
Instr (reg64, regmem64, none, "0F4E/r", {}, {cpuAMD64});
Mnem ("CMOVNGE");
Instr (reg16, regmem16, none, "0F4C/r", {optO16}, {cpuP6});
Instr (reg32, regmem32, none, "0F4C/r", {optO32}, {cpuP6});
Instr (reg64, regmem64, none, "0F4C/r", {}, {cpuAMD64});
Mnem ("CMOVNL");
Instr (reg16, regmem16, none, "0F4D/r", {optO16}, {cpuP6});
Instr (reg32, regmem32, none, "0F4D/r", {optO32}, {cpuP6});
Instr (reg64, regmem64, none, "0F4D/r", {}, {cpuAMD64});
Mnem ("CMOVNLE");
Instr (reg16, regmem16, none, "0F4F/r", {optO16}, {cpuP6});
Instr (reg32, regmem32, none, "0F4F/r", {optO32}, {cpuP6});
Instr (reg64, regmem64, none, "0F4F/r", {}, {cpuAMD64});
Mnem ("CMOVNO");
Instr (reg16, regmem16, none, "0F41/r", {optO16}, {cpuP6});
Instr (reg32, regmem32, none, "0F41/r", {optO32}, {cpuP6});
Instr (reg64, regmem64, none, "0F41/r", {}, {cpuAMD64});
Mnem ("CMOVNP");
Instr (reg16, regmem16, none, "0F4B/r", {optO16}, {cpuP6});
Instr (reg32, regmem32, none, "0F4B/r", {optO32}, {cpuP6});
Instr (reg64, regmem64, none, "0F4B/r", {}, {cpuAMD64});
Mnem ("CMOVNS");
Instr (reg16, regmem16, none, "0F49/r", {optO16}, {cpuP6});
Instr (reg32, regmem32, none, "0F49/r", {optO32}, {cpuP6});
Instr (reg64, regmem64, none, "0F49/r", {}, {cpuAMD64});
Mnem ("CMOVNZ");
Instr (reg16, regmem16, none, "0F45/r", {optO16}, {cpuP6});
Instr (reg32, regmem32, none, "0F45/r", {optO32}, {cpuP6});
Instr (reg64, regmem64, none, "0F45/r", {}, {cpuAMD64});
Mnem ("CMOVO");
Instr (reg16, regmem16, none, "0F40/r", {optO16}, {cpuP6});
Instr (reg32, regmem32, none, "0F40/r", {optO32}, {cpuP6});
Instr (reg64, regmem64, none, "0F40/r", {}, {cpuAMD64});
Mnem ("CMOVP");
Instr (reg16, regmem16, none, "0F4A/r", {optO16}, {cpuP6});
Instr (reg32, regmem32, none, "0F4A/r", {optO32}, {cpuP6});
Instr (reg64, regmem64, none, "0F4A/r", {}, {cpuAMD64});
Mnem ("CMOVPE");
Instr (reg16, regmem16, none, "0F4A/r", {optO16}, {cpuP6});
Instr (reg32, regmem32, none, "0F4A/r", {optO32}, {cpuP6});
Instr (reg64, regmem64, none, "0F4A/r", {}, {cpuAMD64});
Mnem ("CMOVPO");
Instr (reg16, regmem16, none, "0F4B/r", {optO16}, {cpuP6});
Instr (reg32, regmem32, none, "0F4B/r", {optO32}, {cpuP6});
Instr (reg64, regmem64, none, "0F4B/r", {}, {cpuAMD64});
Mnem ("CMOVS");
Instr (reg16, regmem16, none, "0F48/r", {optO16}, {cpuP6});
Instr (reg32, regmem32, none, "0F48/r", {optO32}, {cpuP6});
Instr (reg64, regmem64, none, "0F48/r", {}, {cpuAMD64});
Mnem ("CMOVZ");
Instr (reg16, regmem16, none, "0F44/r", {optO16}, {cpuP6});
Instr (reg32, regmem32, none, "0F44/r", {optO32}, {cpuP6});
Instr (reg64, regmem64, none, "0F44/r", {}, {cpuAMD64});
Mnem ("CMP");
Instr (AL, imm8, none, "3Cib", {}, {cpu8086});
Instr (AX, imm16, none, "3Diw", {optO16}, {cpu8086});
Instr (EAX, imm32, none, "3Did", {optO32}, {cpu386});
Instr (RAX, imm32, none, "3Did", {}, {cpuAMD64});
Instr (regmem8, reg8, none, "38/r", {}, {cpu8086});
Instr (regmem16, reg16, none, "39/r", {optO16}, {cpu8086});
Instr (regmem32, reg32, none, "39/r", {optO32}, {cpu386});
Instr (regmem64, reg64, none, "39/r", {}, {cpuAMD64});
Instr (reg8, regmem8, none, "3A/r", {}, {cpu8086});
Instr (reg16, regmem16, none, "3B/r", {optO16}, {cpu8086});
Instr (reg32, regmem32, none, "3B/r", {optO32}, {cpu386});
Instr (reg64, regmem64, none, "3B/r", {}, {cpuAMD64});
Instr (regmem8, imm8, none, "80/7ib", {}, {cpu8086});
Instr (regmem16, simm8, none, "83/7ib", {optO16}, {cpu8086});
Instr (regmem16, imm16, none, "81/7iw", {optO16}, {cpu8086});
Instr (regmem32, simm8, none, "83/7ib", {optO32}, {cpu386});
Instr (regmem32, imm32, none, "81/7id", {optO32}, {cpu386});
Instr (regmem64, simm8, none, "83/7ib", {}, {cpuAMD64});
Instr (regmem64, imm32, none, "81/7id", {}, {cpuAMD64});
Mnem ("CMPPD");
Instr (xmm, xmmmem128, uimm8, "0FC2/rib", {optPOP}, {cpuWillamette, cpuSSE2});
Mnem ("CMPPS");
Instr (xmm, xmmmem128, uimm8, "0FC2/rib", {}, {cpuKatmai, cpuSSE});
Mnem ("CMPS");
Instr (mem8, mem8, none, "A6", {}, {cpu8086});
Instr (mem16, mem16, none, "A7", {optO16}, {cpu8086});
Instr (mem32, mem32, none, "A7", {optO32}, {cpu386});
Instr (mem64, mem64, none, "A7", {}, {cpuAMD64});
Mnem ("CMPSB");
Instr (none, none, none, "A6", {}, {cpu8086});
Mnem ("CMPSD");
Instr (none, none, none, "A7", {optO32}, {cpu386});
Instr (xmm, xmmmem64, uimm8, "0FC2/rib", {optPREPN}, {cpuWillamette, cpuSSE2});
Mnem ("CMPSQ");
Instr (none, none, none, "A7", {optO64}, {cpuAMD64});
Mnem ("CMPSS");
Instr (xmm, xmmmem32, uimm8, "0FC2/rib", {optPREP}, {cpuKatmai, cpuSSE});
Mnem ("CMPSW");
Instr (none, none, none, "A7", {optO16}, {cpu8086});
Mnem ("CMPXCHG");
Instr (regmem8, reg8, none, "0FB0/r", {}, {cpuPentium});
Instr (regmem16, reg16, none, "0FB1/r", {optO16}, {cpuPentium});
Instr (regmem32, reg32, none, "0FB1/r", {optO32}, {cpuPentium});
Instr (regmem64, reg64, none, "0FB1/r", {}, {cpuAMD64});
Mnem ("CMPXCHG16B");
Instr (mem128, none, none, "0FC7/1", {}, {cpuWillamette, cpuSSE2});
Mnem ("CMPXCHG8B");
Instr (mem64, none, none, "0FC7/1", {}, {cpuPentium});
Mnem ("COMISD");
Instr (xmm, xmmmem64, none, "0F2F/r", {optPOP}, {cpuWillamette, cpuSSE2});
Mnem ("COMISS");
Instr (xmm, xmmmem32, none, "0F2F/r", {}, {cpuKatmai, cpuSSE});
Mnem ("CPUID");
Instr (none, none, none, "0FA2", {}, {cpuPentium});
Mnem ("CQO");
Instr (none, none, none, "99", {optO64}, {cpuAMD64});
Mnem ("CVTDQ2PD");
Instr (xmm, xmmmem64, none, "0FE6/r", {optPREP}, {cpuWillamette, cpuSSE2});
Mnem ("CVTDQ2PS");
Instr (xmm, xmmmem128, none, "0F5B/r", {}, {cpuWillamette, cpuSSE2});
Mnem ("CVTPD2DQ");
Instr (xmm, xmmmem128, none, "0FE6/r", {optPREPN}, {cpuWillamette, cpuSSE2});
Mnem ("CVTPD2PI");
Instr (mmx, xmmmem128, none, "0F2D/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, xmmmem128, none, "0F2D/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, xmmmem128, none, "0F2C/r", {optPOP}, {cpuWillamette, cpuSSE2});
Mnem ("CVTPD2PS");
Instr (xmm, xmmmem128, none, "0F5A/r", {optPOP}, {cpuWillamette, cpuSSE2});
Mnem ("CVTPI2PD");
Instr (xmm, mmxmem64, none, "0F2A/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (xmm, mmxmem64, none, "0F2A/r", {optPOP}, {cpuWillamette, cpuSSE2});
Mnem ("CVTPI2PS");
Instr (xmm, mmxmem64, none, "0F2A/r", {}, {cpuKatmai, cpuSSE});
Instr (xmm, mmxmem64, none, "0F2A/r", {}, {cpuKatmai, cpuSSE});
Mnem ("CVTPS2DQ");
Instr (xmm, xmmmem128, none, "0F5B/r", {optPOP}, {cpuWillamette, cpuSSE2});
Mnem ("CVTPS2PD");
Instr (xmm, xmmmem64, none, "0F5A/r", {}, {cpuWillamette, cpuSSE2});
Mnem ("CVTPS2PI");
Instr (mmx, xmmmem64, none, "0F2D/r", {}, {cpuKatmai, cpuSSE});
Instr (mmx, xmmmem64, none, "0F2D/r", {}, {cpuKatmai, cpuSSE});
Mnem ("CVTSD2SI");
Instr (reg32, xmmmem64, none, "0F2D/r", {optPREPN}, {cpuWillamette, cpuSSE2});
Instr (reg64, xmmmem64, none, "0F2D/r", {optPREPN}, {cpuAMD64, cpuSSE2});
Mnem ("CVTSD2SS");
Instr (xmm, xmmmem64, none, "0F5A/r", {optPREPN}, {cpuWillamette, cpuSSE2});
Mnem ("CVTSI2SD");
Instr (xmm, regmem32, none, "0F2A/r", {optPREPN}, {cpuWillamette, cpuSSE2});
Instr (xmm, regmem64, none, "0F2A/r", {optPREPN}, {cpuAMD64, cpuSSE2});
Mnem ("CVTSI2SS");
Instr (xmm, regmem32, none, "0F2A/r", {optPREP}, {cpuKatmai, cpuSSE});
Instr (xmm, regmem64, none, "0F2A/r", {optPREP}, {cpuAMD64, cpuSSE});
Mnem ("CVTSS2SD");
Instr (xmm, xmmmem32, none, "0F5A/r", {optPREP}, {cpuWillamette, cpuSSE2});
Mnem ("CVTSS2SI");
Instr (reg32, xmmmem32, none, "0F2D/r", {optPREP}, {cpuKatmai, cpuSSE});
Instr (reg64, xmmmem32, none, "0F2D/r", {optPREP}, {cpuAMD64, cpuSSE});
Mnem ("CVTTPD2DQ");
Instr (xmm, xmmmem128, none, "0FE6/r", {optPOP}, {cpuWillamette, cpuSSE2});
Mnem ("CVTTPD2PI");
Instr (mmx, xmmmem128, none, "0F2C/r", {optPOP}, {cpuWillamette, cpuSSE2});
Mnem ("CVTTPS2DQ");
Instr (xmm, xmmmem128, none, "0F5B/r", {optPREP}, {cpuWillamette, cpuSSE2});
Mnem ("CVTTPS2PI");
Instr (mmx, xmmmem64, none, "0F2C/r", {}, {cpuKatmai, cpuSSE});
Instr (mmx, xmmmem64, none, "0F2C/r", {}, {cpuKatmai, cpuSSE});
Mnem ("CVTTSD2SI");
Instr (reg32, xmmmem64, none, "0F2C/r", {optPREPN}, {cpuWillamette, cpuSSE2});
Instr (reg64, xmmmem64, none, "0F2C/r", {optPREPN}, {cpuAMD64, cpuSSE2});
Mnem ("CVTTSS2SI");
Instr (reg32, xmmmem32, none, "0F2C/r", {optPREP}, {cpuKatmai, cpuSSE});
Instr (reg64, xmmmem32, none, "0F2C/r", {optPREP}, {cpuAMD64, cpuSSE});
Mnem ("CWD");
Instr (none, none, none, "99", {optO16}, {cpu8086});
Mnem ("CWDE");
Instr (none, none, none, "98", {optO32}, {cpu386});
Mnem ("DAA");
Instr (none, none, none, "27", {optI64}, {cpu8086});
Mnem ("DAS");
Instr (none, none, none, "2F", {optI64}, {cpu8086});
Mnem ("DEC");
Instr (reg16, none, none, "48rw", {optO16, optI64}, {cpu8086});
Instr (reg32, none, none, "48rd", {optO32, optI64}, {cpu386});
Instr (regmem8, none, none, "FE/1", {}, {cpu8086});
Instr (regmem16, none, none, "FF/1", {optO16}, {cpu8086});
Instr (regmem32, none, none, "FF/1", {optO32}, {cpu386});
Instr (regmem64, none, none, "FF/1", {}, {cpuAMD64});
Mnem ("DIV");
Instr (regmem8, none, none, "F6/6", {}, {cpu8086});
Instr (regmem16, none, none, "F7/6", {optO16}, {cpu8086});
Instr (regmem32, none, none, "F7/6", {optO32}, {cpu386});
Instr (regmem64, none, none, "F7/6", {}, {cpuAMD64});
Mnem ("DIVPD");
Instr (xmm, xmmmem128, none, "0F5E/r", {optPOP}, {cpuWillamette, cpuSSE2});
Mnem ("DIVPS");
Instr (xmm, xmmmem128, none, "0F5E/r", {}, {cpuKatmai, cpuSSE});
Mnem ("DIVSD");
Instr (xmm, xmmmem64, none, "0F5E/r", {optPREPN}, {cpuWillamette, cpuSSE2});
Mnem ("DIVSS");
Instr (xmm, xmmmem32, none, "0F5E/r", {optPREP}, {cpuKatmai, cpuSSE});
Mnem ("EMMS");
Instr (none, none, none, "0F77", {}, {cpuPentium, cpuMMX});
Mnem ("ENTER");
Instr (uimm16, uimm8, none, "C8iwib", {}, {cpu186});
Mnem ("F2XM1");
Instr (none, none, none, "D9F0", {}, {cpu8086, cpuFPU});
Mnem ("FABS");
Instr (none, none, none, "D9E1", {}, {cpu8086, cpuFPU});
Mnem ("FADD");
Instr (st0, sti, none, "D8C0+i", {}, {cpu8086, cpuFPU});
Instr (sti, st0, none, "DCC0+i", {}, {cpu8086, cpuFPU});
Instr (mem32, none, none, "D8/0", {}, {cpu8086, cpuFPU});
Instr (mem64, none, none, "DC/0", {}, {cpu8086, cpuFPU});
Mnem ("FADDP");
Instr (none, none, none, "DEC1", {}, {cpu8086, cpuFPU});
Instr (sti, st0, none, "DEC0+i", {}, {cpu8086, cpuFPU});
Mnem ("FBLD");
Instr (mem, none, none, "DF/4", {}, {cpu8086, cpuFPU});
Mnem ("FBSTP");
Instr (mem, none, none, "DF/6", {}, {cpu8086, cpuFPU});
Mnem ("FCHS");
Instr (none, none, none, "D9E0", {}, {cpu8086, cpuFPU});
Mnem ("FCLEX");
Instr (none, none, none, "9BDBE2", {}, {cpu8086, cpuFPU});
Mnem ("FCMOVB");
Instr (st0, sti, none, "DAC0+i", {}, {cpuP6, cpuFPU});
Mnem ("FCMOVBE");
Instr (st0, sti, none, "DAD0+i", {}, {cpuP6, cpuFPU});
Mnem ("FCMOVE");
Instr (st0, sti, none, "DAC8+i", {}, {cpuP6, cpuFPU});
Mnem ("FCMOVNB");
Instr (st0, sti, none, "DBC0+i", {}, {cpuP6, cpuFPU});
Mnem ("FCMOVNBE");
Instr (st0, sti, none, "DBD0+i", {}, {cpuP6, cpuFPU});
Mnem ("FCMOVNE");
Instr (st0, sti, none, "DBC8+i", {}, {cpuP6, cpuFPU});
Mnem ("FCMOVNU");
Instr (st0, sti, none, "DBD8+i", {}, {cpuP6, cpuFPU});
Mnem ("FCMOVU");
Instr (st0, sti, none, "DAD8+i", {}, {cpuP6, cpuFPU});
Mnem ("FCOM");
Instr (none, none, none, "D8D1", {}, {cpu8086, cpuFPU});
Instr (sti, none, none, "D8D0+i", {}, {cpu8086, cpuFPU});
Instr (mem32, none, none, "D8/2", {}, {cpu8086, cpuFPU});
Instr (mem64, none, none, "DC/2", {}, {cpu8086, cpuFPU});
Mnem ("FCOMI");
Instr (st0, sti, none, "DBF0+i", {}, {cpuP6, cpuFPU});
Mnem ("FCOMIP");
Instr (st0, sti, none, "DFF0+i", {}, {cpuP6, cpuFPU});
Mnem ("FCOMP");
Instr (none, none, none, "D8D9", {}, {cpu8086, cpuFPU});
Instr (sti, none, none, "D8D8+i", {}, {cpu8086, cpuFPU});
Instr (mem32, none, none, "D8/3", {}, {cpu8086, cpuFPU});
Instr (mem64, none, none, "DC/3", {}, {cpu8086, cpuFPU});
Mnem ("FCOMPP");
Instr (none, none, none, "DED9", {}, {cpu8086, cpuFPU});
Mnem ("FCOS");
Instr (none, none, none, "D9FF", {}, {cpu386, cpuFPU});
Mnem ("FDECSTP");
Instr (none, none, none, "D9F6", {}, {cpu8086, cpuFPU});
Mnem ("FDIV");
Instr (st0, sti, none, "D8F0+i", {}, {cpu8086, cpuFPU});
Instr (sti, st0, none, "DCF8+i", {}, {cpu8086, cpuFPU});
Instr (mem32, none, none, "D8/6", {}, {cpu8086, cpuFPU});
Instr (mem64, none, none, "DC/6", {}, {cpu8086, cpuFPU});
Mnem ("FDIVP");
Instr (none, none, none, "DEF9", {}, {cpu8086, cpuFPU});
Instr (sti, st0, none, "DEF8+i", {}, {cpu8086, cpuFPU});
Mnem ("FDIVR");
Instr (st0, sti, none, "D8F8+i", {}, {cpu8086, cpuFPU});
Instr (sti, st0, none, "DCF0+i", {}, {cpu8086, cpuFPU});
Instr (mem32, none, none, "D8/7", {}, {cpu8086, cpuFPU});
Instr (mem64, none, none, "DC/7", {}, {cpu8086, cpuFPU});
Mnem ("FDIVRP");
Instr (none, none, none, "DEF1", {}, {cpu8086, cpuFPU});
Instr (sti, st0, none, "DEF0+i", {}, {cpu8086, cpuFPU});
Mnem ("FEMMS");
Instr (none, none, none, "0F0E", {}, {cpuPentium, cpu3DNow});
Mnem ("FFREE");
Instr (sti, none, none, "DDC0+i", {}, {cpu8086, cpuFPU});
Mnem ("FIADD");
Instr (mem16, none, none, "DE/0", {}, {cpu8086, cpuFPU});
Instr (mem32, none, none, "DA/0", {}, {cpu8086, cpuFPU});
Mnem ("FICOM");
Instr (mem16, none, none, "DE/2", {}, {cpu8086, cpuFPU});
Instr (mem32, none, none, "DA/2", {}, {cpu8086, cpuFPU});
Mnem ("FICOMP");
Instr (mem16, none, none, "DE/3", {}, {cpu8086, cpuFPU});
Instr (mem32, none, none, "DA/3", {}, {cpu8086, cpuFPU});
Mnem ("FIDIV");
Instr (mem16, none, none, "DE/6", {}, {cpu8086, cpuFPU});
Instr (mem32, none, none, "DA/6", {}, {cpu8086, cpuFPU});
Mnem ("FIDIVR");
Instr (mem16, none, none, "DE/7", {}, {cpu8086, cpuFPU});
Instr (mem32, none, none, "DA/7", {}, {cpu8086, cpuFPU});
Mnem ("FILD");
Instr (mem16, none, none, "DF/0", {}, {cpu8086, cpuFPU});
Instr (mem32, none, none, "DB/0", {}, {cpu8086, cpuFPU});
Instr (mem64, none, none, "DF/5", {}, {cpu8086, cpuFPU});
Mnem ("FIMUL");
Instr (mem16, none, none, "DE/1", {}, {cpu8086, cpuFPU});
Instr (mem32, none, none, "DA/1", {}, {cpu8086, cpuFPU});
Mnem ("FINCSTP");
Instr (none, none, none, "D9F7", {}, {cpu8086, cpuFPU});
Mnem ("FINIT");
Instr (none, none, none, "9BDBE3", {}, {cpu8086, cpuFPU});
Mnem ("FIST");
Instr (mem16, none, none, "DF/2", {}, {cpu8086, cpuFPU});
Instr (mem32, none, none, "DB/2", {}, {cpu8086, cpuFPU});
Mnem ("FISTP");
Instr (mem16, none, none, "DF/3", {}, {cpu8086, cpuFPU});
Instr (mem32, none, none, "DB/3", {}, {cpu8086, cpuFPU});
Instr (mem64, none, none, "DF/7", {}, {cpu8086, cpuFPU});
Mnem ("FISTTP");
Instr (mem16, none, none, "DF/1", {}, {cpuPrescott, cpuFPU});
Instr (mem32, none, none, "DB/1", {}, {cpuPrescott, cpuFPU});
Instr (mem64, none, none, "DD/1", {}, {cpuPrescott, cpuFPU});
Mnem ("FISUB");
Instr (mem16, none, none, "DE/4", {}, {cpu8086, cpuFPU});
Instr (mem32, none, none, "DA/4", {}, {cpu8086, cpuFPU});
Mnem ("FISUBR");
Instr (mem16, none, none, "DE/5", {}, {cpu8086, cpuFPU});
Instr (mem32, none, none, "DA/5", {}, {cpu8086, cpuFPU});
Mnem ("FLD");
Instr (sti, none, none, "D9C0+i", {}, {cpu8086, cpuFPU});
Instr (mem32, none, none, "D9/0", {}, {cpu8086, cpuFPU});
Instr (mem64, none, none, "DD/0", {}, {cpu8086, cpuFPU});
Instr (mem, none, none, "DB/5", {}, {cpu8086, cpuFPU});
Mnem ("FLD1");
Instr (none, none, none, "D9E8", {}, {cpu8086, cpuFPU});
Mnem ("FLDCW");
Instr (mem16, none, none, "D9/5", {}, {cpu8086, cpuFPU});
Mnem ("FLDENV");
Instr (mem, none, none, "D9/4", {}, {cpu8086, cpuFPU});
Mnem ("FLDL2E");
Instr (none, none, none, "D9EA", {}, {cpu8086, cpuFPU});
Mnem ("FLDL2T");
Instr (none, none, none, "D9E9", {}, {cpu8086, cpuFPU});
Mnem ("FLDLG2");
Instr (none, none, none, "D9EC", {}, {cpu8086, cpuFPU});
Mnem ("FLDLN2");
Instr (none, none, none, "D9ED", {}, {cpu8086, cpuFPU});
Mnem ("FLDPI");
Instr (none, none, none, "D9EB", {}, {cpu8086, cpuFPU});
Mnem ("FLDZ");
Instr (none, none, none, "D9EE", {}, {cpu8086, cpuFPU});
Mnem ("FMUL");
Instr (st0, sti, none, "D8C8+i", {}, {cpu8086, cpuFPU});
Instr (sti, st0, none, "DCC8+i", {}, {cpu8086, cpuFPU});
Instr (mem32, none, none, "D8/1", {}, {cpu8086, cpuFPU});
Instr (mem64, none, none, "DC/1", {}, {cpu8086, cpuFPU});
Mnem ("FMULP");
Instr (none, none, none, "DEC9", {}, {cpu8086, cpuFPU});
Instr (sti, st0, none, "DEC8+i", {}, {cpu8086, cpuFPU});
Mnem ("FNCLEX");
Instr (none, none, none, "DBE2", {}, {cpu8086, cpuFPU});
Mnem ("FNINIT");
Instr (none, none, none, "DBE3", {}, {cpu8086, cpuFPU});
Mnem ("FNOP");
Instr (none, none, none, "D9D0", {}, {cpu8086, cpuFPU});
Mnem ("FNSAVE");
Instr (mem, none, none, "DD/6", {}, {cpu8086, cpuFPU});
Instr (mem, none, none, "DD/6", {}, {cpu8086, cpuFPU});
Mnem ("FNSTCW");
Instr (mem16, none, none, "D9/7", {}, {cpu8086, cpuFPU});
Mnem ("FNSTENV");
Instr (mem, none, none, "D9/6", {}, {cpu8086, cpuFPU});
Mnem ("FNSTSW");
Instr (AX, none, none, "DFE0", {}, {cpu286, cpuFPU});
Instr (mem16, none, none, "DD/7", {}, {cpu8086, cpuFPU});
Mnem ("FPATAN");
Instr (none, none, none, "D9F3", {}, {cpu8086, cpuFPU});
Mnem ("FPREM");
Instr (none, none, none, "D9F8", {}, {cpu8086, cpuFPU});
Mnem ("FPREM1");
Instr (none, none, none, "D9F5", {}, {cpu386, cpuFPU});
Mnem ("FPTAN");
Instr (none, none, none, "D9F2", {}, {cpu8086, cpuFPU});
Mnem ("FRNDINT");
Instr (none, none, none, "D9FC", {}, {cpu8086, cpuFPU});
Mnem ("FRSTOR");
Instr (mem, none, none, "DD/4", {}, {cpu8086, cpuFPU});
Instr (mem, none, none, "DD/4", {}, {cpu8086, cpuFPU});
Mnem ("FSAVE");
Instr (mem, none, none, "9BDD/6", {}, {cpu8086, cpuFPU});
Instr (mem, none, none, "9BDD/6", {}, {cpu8086, cpuFPU});
Mnem ("FSCALE");
Instr (none, none, none, "D9FD", {}, {cpu8086, cpuFPU});
Mnem ("FSIN");
Instr (none, none, none, "D9FE", {}, {cpu386, cpuFPU});
Mnem ("FSINCOS");
Instr (none, none, none, "D9FB", {}, {cpu386, cpuFPU});
Mnem ("FSQRT");
Instr (none, none, none, "D9FA", {}, {cpu8086, cpuFPU});
Mnem ("FST");
Instr (sti, none, none, "DDD0+i", {}, {cpu8086, cpuFPU});
Instr (mem32, none, none, "D9/2", {}, {cpu8086, cpuFPU});
Instr (mem64, none, none, "DD/2", {}, {cpu8086, cpuFPU});
Mnem ("FSTCW");
Instr (mem16, none, none, "9BD9/7", {}, {cpu8086, cpuFPU});
Mnem ("FSTENV");
Instr (mem, none, none, "9BD9/6", {}, {cpu8086, cpuFPU});
Mnem ("FSTP");
Instr (sti, none, none, "DDD8+i", {}, {cpu8086, cpuFPU});
Instr (mem32, none, none, "D9/3", {}, {cpu8086, cpuFPU});
Instr (mem64, none, none, "DD/3", {}, {cpu8086, cpuFPU});
Instr (mem, none, none, "DB/7", {}, {cpu8086, cpuFPU});
Mnem ("FSTSW");
Instr (AX, none, none, "9BDFE0", {}, {cpu286, cpuFPU});
Instr (mem16, none, none, "9BDD/7", {}, {cpu8086, cpuFPU});
Mnem ("FSUB");
Instr (st0, sti, none, "D8E0+i", {}, {cpu8086, cpuFPU});
Instr (sti, st0, none, "DCE8+i", {}, {cpu8086, cpuFPU});
Instr (mem32, none, none, "D8/4", {}, {cpu8086, cpuFPU});
Instr (mem64, none, none, "DC/4", {}, {cpu8086, cpuFPU});
Mnem ("FSUBP");
Instr (none, none, none, "DEE9", {}, {cpu8086, cpuFPU});
Instr (sti, st0, none, "DEE8+i", {}, {cpu8086, cpuFPU});
Mnem ("FSUBR");
Instr (st0, sti, none, "D8E8+i", {}, {cpu8086, cpuFPU});
Instr (sti, st0, none, "DCE0+i", {}, {cpu8086, cpuFPU});
Instr (mem32, none, none, "D8/5", {}, {cpu8086, cpuFPU});
Instr (mem64, none, none, "DC/5", {}, {cpu8086, cpuFPU});
Mnem ("FSUBRP");
Instr (none, none, none, "DEE1", {}, {cpu8086, cpuFPU});
Instr (sti, st0, none, "DEE0+i", {}, {cpu8086, cpuFPU});
Mnem ("FTST");
Instr (none, none, none, "D9E4", {}, {cpu8086, cpuFPU});
Mnem ("FUCOM");
Instr (none, none, none, "DDE1", {}, {cpu386, cpuFPU});
Instr (sti, none, none, "DDE0+i", {}, {cpu386, cpuFPU});
Mnem ("FUCOMI");
Instr (st0, sti, none, "DBE8+i", {}, {cpuP6, cpuFPU});
Mnem ("FUCOMIP");
Instr (st0, sti, none, "DFE8+i", {}, {cpuP6, cpuFPU});
Mnem ("FUCOMP");
Instr (none, none, none, "DDE9", {}, {cpu386, cpuFPU});
Instr (sti, none, none, "DDE8+i", {}, {cpu386, cpuFPU});
Mnem ("FUCOMPP");
Instr (none, none, none, "DAE9", {}, {cpu386, cpuFPU});
Mnem ("FWAIT");
Instr (none, none, none, "9B", {}, {cpu8086});
Mnem ("FXAM");
Instr (none, none, none, "D9E5", {}, {cpu8086, cpuFPU});
Mnem ("FXCH");
Instr (none, none, none, "D9C9", {}, {cpu8086, cpuFPU});
Instr (sti, none, none, "D9C8+i", {}, {cpu8086, cpuFPU});
Mnem ("FXRSTOR");
Instr (mem, none, none, "0FAE/1", {}, {cpuP6, cpuSSE, cpuFPU});
Instr (mem, none, none, "0FAE/1", {}, {cpuP6, cpuSSE, cpuFPU});
Instr (mem, none, none, "0FAE/1", {}, {cpuP6, cpuSSE, cpuFPU});
Mnem ("FXSAVE");
Instr (mem, none, none, "0FAE/0", {}, {cpuP6, cpuSSE, cpuFPU});
Instr (mem, none, none, "0FAE/0", {}, {cpuP6, cpuSSE, cpuFPU});
Instr (mem, none, none, "0FAE/0", {}, {cpuP6, cpuSSE, cpuFPU});
Mnem ("FXTRACT");
Instr (none, none, none, "D9F4", {}, {cpu8086, cpuFPU});
Mnem ("FYL2X");
Instr (none, none, none, "D9F1", {}, {cpu8086, cpuFPU});
Mnem ("FYL2XP1");
Instr (none, none, none, "D9F9", {}, {cpu8086, cpuFPU});
Mnem ("HADDPD");
Instr (xmm, xmmmem128, none, "0F7C/r", {optPOP}, {cpuPrescott, cpuSSE3});
Mnem ("HADDPS");
Instr (xmm, xmmmem128, none, "0F7C/r", {optPREPN}, {cpuPrescott, cpuSSE3});
Mnem ("HLT");
Instr (none, none, none, "F4", {}, {cpu8086, cpuPrivileged});
Mnem ("HSUBPD");
Instr (xmm, xmmmem128, none, "0F7D/r", {optPOP}, {cpuPrescott, cpuSSE3});
Mnem ("HSUBPS");
Instr (xmm, xmmmem128, none, "0F7D/r", {optPREPN}, {cpuPrescott, cpuSSE3});
Mnem ("IDIV");
Instr (regmem8, none, none, "F6/7", {}, {cpu8086});
Instr (regmem16, none, none, "F7/7", {optO16}, {cpu8086});
Instr (regmem32, none, none, "F7/7", {optO32}, {cpu386});
Instr (regmem64, none, none, "F7/7", {}, {cpuAMD64});
Mnem ("IMUL");
Instr (regmem8, none, none, "F6/5", {}, {cpu8086});
Instr (regmem16, none, none, "F7/5", {optO16}, {cpu8086});
Instr (regmem32, none, none, "F7/5", {optO32}, {cpu386});
Instr (regmem64, none, none, "F7/5", {}, {cpuAMD64});
Instr (reg16, regmem16, none, "0FAF/r", {optO16}, {cpu386});
Instr (reg32, regmem32, none, "0FAF/r", {optO32}, {cpu386});
Instr (reg64, regmem64, none, "0FAF/r", {}, {cpuAMD64});
Instr (reg16, regmem16, simm8, "6B/rib", {optO16}, {cpu186});
Instr (reg16, regmem16, simm16, "69/riw", {optO16}, {cpu186});
Instr (reg32, regmem32, simm8, "6B/rib", {optO32}, {cpu386});
Instr (reg32, regmem32, simm32, "69/rid", {optO32}, {cpu386});
Instr (reg64, regmem64, simm8, "6B/rib", {}, {cpuAMD64});
Instr (reg64, regmem64, simm32, "69/rid", {}, {cpuAMD64});
Mnem ("IN");
Instr (AL, DX, none, "EC", {}, {cpu8086});
Instr (AX, DX, none, "ED", {optO16}, {cpu8086});
Instr (EAX, DX, none, "ED", {optO32}, {cpu386});
Instr (AL, uimm8, none, "E4ib", {}, {cpu8086});
Instr (AX, uimm8, none, "E5ib", {optO16}, {cpu8086});
Instr (EAX, uimm8, none, "E5ib", {optO32}, {cpu386});
Mnem ("INC");
Instr (reg16, none, none, "40rw", {optO16, optI64}, {cpu8086});
Instr (reg32, none, none, "40rd", {optO32, optI64}, {cpu386});
Instr (regmem8, none, none, "FE/0", {}, {cpu8086});
Instr (regmem16, none, none, "FF/0", {optO16}, {cpu8086});
Instr (regmem32, none, none, "FF/0", {optO32}, {cpu386});
Instr (regmem64, none, none, "FF/0", {}, {cpuAMD64});
Mnem ("INS");
Instr (mem8, DX, none, "6C", {}, {cpu186});
Instr (mem16, DX, none, "6D", {optO16}, {cpu186});
Instr (mem32, DX, none, "6D", {optO32}, {cpu386});
Mnem ("INSB");
Instr (none, none, none, "6C", {}, {cpu186});
Mnem ("INSD");
Instr (none, none, none, "6D", {optO32}, {cpu386});
Mnem ("INSW");
Instr (none, none, none, "6D", {optO16}, {cpu186});
Mnem ("INT");
Instr (three, none, none, "CC", {}, {cpu8086});
Instr (uimm8, none, none, "CDib", {}, {cpu8086});
Mnem ("INT3");
Instr (none, none, none, "CC", {}, {cpu8086});
Mnem ("INTO");
Instr (none, none, none, "CE", {optI64}, {cpu8086});
Mnem ("INVD");
Instr (none, none, none, "0F08", {}, {cpu486, cpuPrivileged});
Mnem ("INVLPG");
Instr (mem8, none, none, "0F01/7", {}, {cpu486, cpuPrivileged});
Mnem ("INVLPGA");
Instr (rAX, ECX, none, "0F01DF", {}, {cpu386, cpuPrivileged});
Mnem ("IRET");
Instr (none, none, none, "CF", {optO16}, {cpu8086});
Mnem ("IRETD");
Instr (none, none, none, "CF", {optO32}, {cpu386});
Mnem ("IRETQ");
Instr (none, none, none, "CF", {optO64}, {cpuAMD64});
Mnem ("JA");
Instr (rel8off, none, none, "77cb", {}, {cpu8086});
Instr (rel16off, none, none, "0F87cw", {}, {cpu386});
Instr (rel32off, none, none, "0F87cd", {}, {cpu386});
Mnem ("JAE");
Instr (rel8off, none, none, "73cb", {}, {cpu8086});
Instr (rel16off, none, none, "0F83cw", {}, {cpu386});
Instr (rel32off, none, none, "0F83cd", {}, {cpu386});
Mnem ("JB");
Instr (rel8off, none, none, "72cb", {}, {cpu8086});
Instr (rel16off, none, none, "0F82cw", {}, {cpu386});
Instr (rel32off, none, none, "0F82cd", {}, {cpu386});
Mnem ("JBE");
Instr (rel8off, none, none, "76cb", {}, {cpu8086});
Instr (rel16off, none, none, "0F86cw", {}, {cpu386});
Instr (rel32off, none, none, "0F86cd", {}, {cpu386});
Mnem ("JC");
Instr (rel8off, none, none, "72cb", {}, {cpu8086});
Instr (rel16off, none, none, "0F82cw", {}, {cpu386});
Instr (rel32off, none, none, "0F82cd", {}, {cpu386});
Mnem ("JCXZ");
Instr (rel8off, none, none, "E3cb", {optA16}, {cpu8086});
Mnem ("JE");
Instr (rel8off, none, none, "74cb", {}, {cpu8086});
Instr (rel16off, none, none, "0F84cw", {}, {cpu386});
Instr (rel32off, none, none, "0F84cd", {}, {cpu386});
Mnem ("JECXZ");
Instr (rel8off, none, none, "E3cb", {optA32}, {cpu386});
Mnem ("JG");
Instr (rel8off, none, none, "7Fcb", {}, {cpu8086});
Instr (rel16off, none, none, "0F8Fcw", {}, {cpu386});
Instr (rel32off, none, none, "0F8Fcd", {}, {cpu386});
Mnem ("JGE");
Instr (rel8off, none, none, "7Dcb", {}, {cpu8086});
Instr (rel16off, none, none, "0F8Dcw", {}, {cpu386});
Instr (rel32off, none, none, "0F8Dcd", {}, {cpu386});
Mnem ("JL");
Instr (rel8off, none, none, "7Ccb", {}, {cpu8086});
Instr (rel16off, none, none, "0F8Ccw", {}, {cpu386});
Instr (rel32off, none, none, "0F8Ccd", {}, {cpu386});
Mnem ("JLE");
Instr (rel8off, none, none, "7Ecb", {}, {cpu8086});
Instr (rel16off, none, none, "0F8Ecw", {}, {cpu386});
Instr (rel32off, none, none, "0F8Ecd", {}, {cpu386});
Mnem ("JMP");
Instr (rel8off, none, none, "EBcb", {}, {cpu8086});
Instr (rel16off, none, none, "E9cw", {}, {cpu8086});
Instr (rel32off, none, none, "E9cd", {}, {cpu8086});
Instr (regmem16, none, none, "FF/4", {optO16}, {cpu8086});
Instr (regmem32, none, none, "FF/4", {optO32}, {cpu386});
Instr (regmem64, none, none, "FF/4", {}, {cpuAMD64});
Instr (mem, none, none, "FF/5", {optO16}, {cpu8086});
Instr (mem, none, none, "FF/5", {optO32}, {cpu386});
Instr (imm16, imm16, none, "EAiwiw", {optO16, optI64}, {cpu8086});
Instr (imm16, imm32, none, "EAidiw", {optO32, optI64}, {cpu386});
Mnem ("JNA");
Instr (rel8off, none, none, "76cb", {}, {cpu8086});
Instr (rel16off, none, none, "0F86cw", {}, {cpu386});
Instr (rel32off, none, none, "0F86cd", {}, {cpu386});
Mnem ("JNAE");
Instr (rel8off, none, none, "72cb", {}, {cpu8086});
Instr (rel16off, none, none, "0F82cw", {}, {cpu386});
Instr (rel32off, none, none, "0F82cd", {}, {cpu386});
Mnem ("JNB");
Instr (rel8off, none, none, "73cb", {}, {cpu8086});
Instr (rel16off, none, none, "0F83cw", {}, {cpu386});
Instr (rel32off, none, none, "0F83cd", {}, {cpu386});
Mnem ("JNBE");
Instr (rel8off, none, none, "77cb", {}, {cpu8086});
Instr (rel16off, none, none, "0F87cw", {}, {cpu386});
Instr (rel32off, none, none, "0F87cd", {}, {cpu386});
Mnem ("JNC");
Instr (rel8off, none, none, "73cb", {}, {cpu8086});
Instr (rel16off, none, none, "0F83cw", {}, {cpu386});
Instr (rel32off, none, none, "0F83cd", {}, {cpu386});
Mnem ("JNE");
Instr (rel8off, none, none, "75cb", {}, {cpu8086});
Instr (rel16off, none, none, "0F85cw", {}, {cpu386});
Instr (rel32off, none, none, "0F85cd", {}, {cpu386});
Mnem ("JNG");
Instr (rel8off, none, none, "7Ecb", {}, {cpu8086});
Instr (rel16off, none, none, "0F8Ecw", {}, {cpu386});
Instr (rel32off, none, none, "0F8Ecd", {}, {cpu386});
Mnem ("JNGE");
Instr (rel8off, none, none, "7Ccb", {}, {cpu8086});
Instr (rel16off, none, none, "0F8Ccw", {}, {cpu386});
Instr (rel32off, none, none, "0F8Ccd", {}, {cpu386});
Mnem ("JNL");
Instr (rel8off, none, none, "7Dcb", {}, {cpu8086});
Instr (rel16off, none, none, "0F8Dcw", {}, {cpu386});
Instr (rel32off, none, none, "0F8Dcd", {}, {cpu386});
Mnem ("JNLE");
Instr (rel8off, none, none, "7Fcb", {}, {cpu8086});
Instr (rel16off, none, none, "0F8Fcw", {}, {cpu386});
Instr (rel32off, none, none, "0F8Fcd", {}, {cpu386});
Mnem ("JNO");
Instr (rel8off, none, none, "71cb", {}, {cpu8086});
Instr (rel16off, none, none, "0F81cw", {}, {cpu386});
Instr (rel32off, none, none, "0F81cd", {}, {cpu386});
Mnem ("JNP");
Instr (rel8off, none, none, "7Bcb", {}, {cpu8086});
Instr (rel16off, none, none, "0F8Bcw", {}, {cpu386});
Instr (rel32off, none, none, "0F8Bcd", {}, {cpu386});
Mnem ("JNS");
Instr (rel8off, none, none, "79cb", {}, {cpu8086});
Instr (rel16off, none, none, "0F89cw", {}, {cpu386});
Instr (rel32off, none, none, "0F89cd", {}, {cpu386});
Mnem ("JNZ");
Instr (rel8off, none, none, "75cb", {}, {cpu8086});
Instr (rel16off, none, none, "0F85cw", {}, {cpu386});
Instr (rel32off, none, none, "0F85cd", {}, {cpu386});
Mnem ("JO");
Instr (rel8off, none, none, "70cb", {}, {cpu8086});
Instr (rel16off, none, none, "0F80cw", {}, {cpu386});
Instr (rel32off, none, none, "0F80cd", {}, {cpu386});
Mnem ("JP");
Instr (rel8off, none, none, "7Acb", {}, {cpu8086});
Instr (rel16off, none, none, "0F8Acw", {}, {cpu386});
Instr (rel32off, none, none, "0F8Acd", {}, {cpu386});
Mnem ("JPE");
Instr (rel8off, none, none, "7Acb", {}, {cpu8086});
Instr (rel16off, none, none, "0F8Acw", {}, {cpu386});
Instr (rel32off, none, none, "0F8Acd", {}, {cpu386});
Mnem ("JPO");
Instr (rel8off, none, none, "7Bcb", {}, {cpu8086});
Instr (rel16off, none, none, "0F8Bcw", {}, {cpu386});
Instr (rel32off, none, none, "0F8Bcd", {}, {cpu386});
Mnem ("JRCXZ");
Instr (rel8off, none, none, "E3cb", {}, {cpuAMD64});
Mnem ("JS");
Instr (rel8off, none, none, "78cb", {}, {cpu8086});
Instr (rel16off, none, none, "0F88cw", {}, {cpu386});
Instr (rel32off, none, none, "0F88cd", {}, {cpu386});
Mnem ("JZ");
Instr (rel8off, none, none, "74cb", {}, {cpu8086});
Instr (rel16off, none, none, "0F84cw", {}, {cpu386});
Instr (rel32off, none, none, "0F84cd", {}, {cpu386});
Mnem ("LAHF");
Instr (none, none, none, "9F", {}, {cpu8086});
Mnem ("LAR");
Instr (reg16, regmem16, none, "0F02/r", {optO16}, {cpu286, cpuPrivileged});
Instr (reg32, regmem16, none, "0F02/r", {optO32}, {cpu286, cpuPrivileged});
Instr (reg64, regmem16, none, "0F02/r", {}, {cpuAMD64, cpuPrivileged});
Mnem ("LDDQU");
Instr (xmm, mem128, none, "0FF0/r", {optPREPN}, {cpuPrescott, cpuSSE3});
Mnem ("LDMXCSR");
Instr (mem32, none, none, "0FAE/2", {}, {cpuKatmai, cpuSSE});
Mnem ("LDS");
Instr (reg16, mem, none, "C5/r", {optO16, optI64}, {cpu8086});
Instr (reg32, mem, none, "C5/r", {optO32, optI64}, {cpu386});
Mnem ("LEA");
Instr (reg16, mem, none, "8D/r", {optO16}, {cpu8086});
Instr (reg32, mem, none, "8D/r", {optO32}, {cpu386});
Instr (reg64, mem, none, "8D/r", {}, {cpuAMD64});
Mnem ("LEAVE");
Instr (none, none, none, "C9", {}, {cpu186});
Mnem ("LES");
Instr (reg16, mem, none, "C4/r", {optO16, optI64}, {cpu8086});
Instr (reg32, mem, none, "C4/r", {optO32, optI64}, {cpu386});
Mnem ("LFENCE");
Instr (none, none, none, "0FAEE8", {}, {cpuWillamette, cpuSSE2});
Mnem ("LFS");
Instr (reg16, mem, none, "0FB4/r", {optO16}, {cpu386});
Instr (reg32, mem, none, "0FB4/r", {optO32}, {cpu386});
Mnem ("LGDT");
Instr (mem, none, none, "0F01/2", {}, {cpu286, cpuPrivileged});
Instr (mem, none, none, "0F01/2", {}, {cpuAMD64, cpuPrivileged});
Mnem ("LGS");
Instr (reg16, mem, none, "0FB5/r", {optO16}, {cpu386});
Instr (reg32, mem, none, "0FB5/r", {optO32}, {cpu386});
Mnem ("LIDT");
Instr (mem, none, none, "0F01/3", {}, {cpu286, cpuPrivileged});
Instr (mem, none, none, "0F01/3", {}, {cpuAMD64, cpuPrivileged});
Mnem ("LLDT");
Instr (regmem16, none, none, "0F00/2", {}, {cpu286, cpuPrivileged});
Mnem ("LMSW");
Instr (regmem16, none, none, "0F01/6", {}, {cpu286, cpuPrivileged});
Mnem ("LODS");
Instr (mem8, none, none, "AC", {}, {cpu8086});
Instr (mem16, none, none, "AD", {optO16}, {cpu8086});
Instr (mem32, none, none, "AD", {optO32}, {cpu386});
Instr (mem64, none, none, "AD", {}, {cpuAMD64});
Mnem ("LODSB");
Instr (none, none, none, "AC", {}, {cpu8086});
Mnem ("LODSD");
Instr (none, none, none, "AD", {optO32}, {cpu386});
Mnem ("LODSQ");
Instr (none, none, none, "AD", {optO64}, {cpuAMD64});
Mnem ("LODSW");
Instr (none, none, none, "AD", {optO16}, {cpu8086});
Mnem ("LOOP");
Instr (rel8off, none, none, "E2cb", {}, {cpu8086});
Mnem ("LOOPE");
Instr (rel8off, none, none, "E1cb", {}, {cpu8086});
Mnem ("LOOPNE");
Instr (rel8off, none, none, "E0cb", {}, {cpu8086});
Mnem ("LOOPNZ");
Instr (rel8off, none, none, "E0cb", {}, {cpu8086});
Mnem ("LOOPZ");
Instr (rel8off, none, none, "E1cb", {}, {cpu8086});
Mnem ("LSL");
Instr (reg16, regmem16, none, "0F03/r", {}, {cpu286, cpuPrivileged});
Instr (reg32, regmem16, none, "0F03/r", {}, {cpu286, cpuPrivileged});
Instr (reg64, regmem16, none, "0F03/r", {}, {cpuAMD64, cpuPrivileged});
Mnem ("LSS");
Instr (reg16, mem, none, "0FB2/r", {optO16}, {cpu386});
Instr (reg32, mem, none, "0FB2/r", {optO32}, {cpu386});
Mnem ("LTR");
Instr (regmem16, none, none, "0F00/3", {}, {cpu286, cpuPrivileged});
Mnem ("MASKMOVDQU");
Instr (xmm, xmm, none, "0FF7/r", {optPOP}, {cpuWillamette, cpuSSE2});
Mnem ("MASKMOVQ");
Instr (mmx, mmx, none, "0FF7/r", {}, {cpuKatmai, cpuMMX});
Mnem ("MAXPD");
Instr (xmm, xmmmem128, none, "0F5F/r", {optPOP}, {cpuWillamette, cpuSSE2});
Mnem ("MAXPS");
Instr (xmm, xmmmem128, none, "0F5F/r", {}, {cpuKatmai, cpuSSE});
Mnem ("MAXSD");
Instr (xmm, xmmmem64, none, "0F5F/r", {optPREPN}, {cpuWillamette, cpuSSE2});
Mnem ("MAXSS");
Instr (xmm, xmmmem32, none, "0F5F/r", {optPREP}, {cpuKatmai, cpuSSE});
Mnem ("MFENCE");
Instr (none, none, none, "0FAEF0", {}, {cpuWillamette, cpuSSE2});
Mnem ("MINPD");
Instr (xmm, xmmmem128, none, "0F5D/r", {optPOP}, {cpuWillamette, cpuSSE2});
Mnem ("MINPS");
Instr (xmm, xmmmem128, none, "0F5D/r", {}, {cpuKatmai, cpuSSE});
Mnem ("MINSD");
Instr (xmm, xmmmem64, none, "0F5D/r", {optPREPN}, {cpuWillamette, cpuSSE2});
Mnem ("MINSS");
Instr (xmm, xmmmem32, none, "0F5D/r", {optPREP}, {cpuKatmai, cpuSSE});
Mnem ("MOV");
Instr (AL, moffset8, none, "A0+o", {}, {cpu8086});
Instr (RAX, moffset64, none, "A1+o", {}, {cpuAMD64});
Instr (reg8, imm8, none, "B0rbib", {}, {cpu8086});
Instr (moffset8, AL, none, "A2+o", {}, {cpu8086});
Instr (moffset16, AX, none, "A3+o", {optO16}, {cpu8086});
Instr (reg16, imm16, none, "B8rwiw", {optO16}, {cpu8086});
Instr (reg32, imm32, none, "B8rdid", {optO32}, {cpu386});
Instr (moffset32, EAX, none, "A3+o", {optO32}, {cpu386});
Instr (moffset64, RAX, none, "A3+o", {}, {cpuAMD64});
Instr (AX, moffset16, none, "A1+o", {optO16}, {cpu8086});
Instr (EAX, moffset32, none, "A1+o", {optO32}, {cpu386});
Instr (regmem16, reg16, none, "89/r", {optO16}, {cpu8086});
Instr (regmem16, segReg, none, "8C/r", {optO16}, {cpu8086});
Instr (regmem32, reg32, none, "89/r", {optO32}, {cpu386});
Instr (regmem32, segReg, none, "8C/r", {optO32}, {cpu386});
Instr (regmem64, reg64, none, "89/r", {}, {cpuAMD64});
Instr (segReg, regmem16, none, "8E/r", {}, {cpu8086});
Instr (regmem8, reg8, none, "88/r", {}, {cpu8086});
Instr (regmem64, segReg, none, "8C/r", {}, {cpuAMD64});
Instr (reg8, regmem8, none, "8A/r", {}, {cpu8086});
Instr (reg16, regmem16, none, "8B/r", {optO16}, {cpu8086});
Instr (reg32, regmem32, none, "8B/r", {optO32}, {cpu386});
Instr (reg64, regmem64, none, "8B/r", {}, {cpuAMD64});
Instr (reg32, CRn, none, "0F20/r", {}, {cpu386});
Instr (reg32, CR8, none, "0F20/r", {optPLOCK}, {cpu386});
Instr (reg32, DRn, none, "0F21/r", {}, {cpu386});
Instr (reg64, CRn, none, "0F20/r", {optD64}, {cpuAMD64});
Instr (reg64, CR8, none, "0F20/r", {optD64, optPLOCK}, {cpuAMD64});
Instr (reg64, DRn, none, "0F21/r", {optD64}, {cpuAMD64});
Instr (CRn, reg32, none, "0F22/r", {}, {cpu386});
Instr (CRn, reg64, none, "0F22/r", {optD64}, {cpuAMD64});
Instr (CR8, reg32, none, "0F22/r", {optPLOCK}, {cpu386});
Instr (CR8, reg64, none, "0F22/r", {optD64, optPLOCK}, {cpuAMD64});
Instr (DRn, reg32, none, "0F23/r", {}, {cpu386});
Instr (DRn, reg64, none, "0F23/r", {optD64}, {cpuAMD64});
Instr (regmem8, imm8, none, "C6/0ib", {}, {cpu8086});
Instr (regmem16, imm16, none, "C7/0iw", {optO16}, {cpu8086});
Instr (regmem32, imm32, none, "C7/0id", {optO32}, {cpu386});
Instr (regmem64, imm32, none, "C7/0id", {}, {cpuAMD64});
Instr (reg64, imm64, none, "B8rqiq", {}, {cpuAMD64});
Mnem ("MOVAPD");
Instr (xmm, xmmmem128, none, "0F28/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (xmmmem128, xmm, none, "0F29/r", {optPOP}, {cpuWillamette, cpuSSE2});
Mnem ("MOVAPS");
Instr (xmm, xmmmem128, none, "0F28/r", {}, {cpuKatmai, cpuSSE});
Instr (xmmmem128, xmm, none, "0F29/r", {}, {cpuKatmai, cpuSSE});
Mnem ("MOVD");
Instr (xmm, regmem32, none, "0F6E/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (xmm, regmem64, none, "0F6E/r", {optPOP}, {cpuAMD64, cpuSSE2});
Instr (regmem32, xmm, none, "0F7E/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (regmem64, xmm, none, "0F7E/r", {optPOP}, {cpuAMD64, cpuSSE2});
Instr (mmx, regmem32, none, "0F6E/r", {}, {cpuPentium, cpuMMX});
Instr (mmx, regmem64, none, "0F6E/r", {}, {cpuAMD64, cpuMMX});
Instr (regmem32, mmx, none, "0F7E/r", {}, {cpuPentium, cpuMMX});
Instr (regmem64, mmx, none, "0F7E/r", {}, {cpuAMD64, cpuMMX});
Instr (xmm, regmem32, none, "0F6E/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (xmm, regmem64, none, "0F6E/r", {optPOP}, {cpuAMD64, cpuSSE2});
Instr (regmem32, xmm, none, "0F7E/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (regmem64, xmm, none, "0F7E/r", {optPOP}, {cpuAMD64, cpuSSE2});
Instr (mmx, regmem32, none, "0F6E/r", {}, {cpuPentium, cpuMMX});
Instr (mmx, regmem64, none, "0F6E/r", {}, {cpuAMD64, cpuMMX});
Instr (regmem32, mmx, none, "0F7E/r", {}, {cpuPentium, cpuMMX});
Instr (regmem64, mmx, none, "0F7E/r", {}, {cpuAMD64, cpuMMX});
Mnem ("MOVDDUP");
Instr (xmm, xmmmem64, none, "0F12/r", {optPREPN}, {cpuPrescott, cpuSSE3});
Mnem ("MOVDQ2Q");
Instr (mmx, xmm, none, "0FD6/r", {optPREPN}, {cpuWillamette, cpuSSE2});
Instr (mmx, xmm, none, "0FD6/r", {optPREPN}, {cpuWillamette, cpuSSE2});
Mnem ("MOVDQA");
Instr (xmm, xmmmem128, none, "0F6F/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (xmmmem128, xmm, none, "0F7F/r", {optPOP}, {cpuWillamette, cpuSSE2});
Mnem ("MOVDQU");
Instr (xmm, xmmmem128, none, "0F6F/r", {optPREP}, {cpuWillamette, cpuSSE2});
Instr (xmmmem128, xmm, none, "0F7F/r", {optPREP}, {cpuWillamette, cpuSSE2});
Mnem ("MOVHLPS");
Instr (xmm, xmm, none, "0F12/r", {}, {cpuKatmai, cpuSSE});
Mnem ("MOVHPD");
Instr (xmm, mem64, none, "0F16/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mem64, xmm, none, "0F17/r", {optPOP}, {cpuWillamette, cpuSSE2});
Mnem ("MOVHPS");
Instr (xmm, mem64, none, "0F16/r", {}, {cpuKatmai, cpuSSE});
Instr (mem64, xmm, none, "0F17/r", {}, {cpuKatmai, cpuSSE});
Mnem ("MOVLHPS");
Instr (xmm, xmm, none, "0F16/r", {}, {cpuKatmai, cpuSSE});
Mnem ("MOVLPD");
Instr (xmm, mem64, none, "0F12/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mem64, xmm, none, "0F13/r", {optPOP}, {cpuWillamette, cpuSSE2});
Mnem ("MOVLPS");
Instr (xmm, mem64, none, "0F12/r", {}, {cpuKatmai, cpuSSE});
Instr (mem64, xmm, none, "0F13/r", {}, {cpuKatmai, cpuSSE});
Mnem ("MOVMSKPD");
Instr (reg32, xmm, none, "0F50/r", {optPOP}, {cpuWillamette, cpuSSE2});
Mnem ("MOVMSKPS");
Instr (reg32, xmm, none, "0F50/r", {}, {cpuKatmai, cpuSSE});
Instr (reg32, xmm, none, "0F50/r", {}, {cpuKatmai, cpuSSE});
Mnem ("MOVNTDQ");
Instr (mem128, xmm, none, "0FE7/r", {optPOP}, {cpuWillamette, cpuSSE2});
Mnem ("MOVNTI");
Instr (mem32, reg32, none, "0FC3/r", {}, {cpuWillamette, cpuSSE2});
Instr (mem64, reg64, none, "0FC3/r", {}, {cpuAMD64, cpuSSE2});
Mnem ("MOVNTPD");
Instr (mem128, xmm, none, "0F2B/r", {optPOP}, {cpuWillamette, cpuSSE2});
Mnem ("MOVNTPS");
Instr (mem128, xmm, none, "0F2B/r", {}, {cpuKatmai, cpuSSE});
Mnem ("MOVNTQ");
Instr (mem64, mmx, none, "0FE7/r", {}, {cpuKatmai, cpuMMX});
Mnem ("MOVQ");
Instr (xmm, xmmmem64, none, "0F7E/r", {optPREP}, {cpuWillamette, cpuSSE2});
Instr (xmmmem64, xmm, none, "0FD6/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0F6F/r", {}, {cpuPentium, cpuMMX});
Instr (mmxmem64, mmx, none, "0F7F/r", {}, {cpuPentium, cpuMMX});
Mnem ("MOVQ2DQ");
Instr (xmm, mmx, none, "0FD6/r", {optPREP}, {cpuWillamette, cpuSSE2});
Instr (xmm, mmx, none, "0FD6/r", {optPREP}, {cpuWillamette, cpuSSE2});
Mnem ("MOVS");
Instr (mem8, mem8, none, "A4", {}, {cpu8086});
Instr (mem16, mem16, none, "A5", {optO16}, {cpu8086});
Instr (mem32, mem32, none, "A5", {optO32}, {cpu386});
Instr (mem64, mem64, none, "A5", {}, {cpuAMD64});
Mnem ("MOVSB");
Instr (none, none, none, "A4", {}, {cpu8086});
Mnem ("MOVSD");
Instr (none, none, none, "A5", {optO32}, {cpu386});
Instr (xmm, xmmmem64, none, "0F10/r", {optPREPN}, {cpuWillamette, cpuSSE2});
Instr (xmmmem64, xmm, none, "0F11/r", {optPREPN}, {cpuWillamette, cpuSSE2});
Mnem ("MOVSHDUP");
Instr (xmm, xmmmem128, none, "0F16/r", {optPREP}, {cpuPrescott, cpuSSE3});
Mnem ("MOVSLDUP");
Instr (xmm, xmmmem128, none, "0F12/r", {optPREP}, {cpuPrescott, cpuSSE3});
Mnem ("MOVSQ");
Instr (none, none, none, "A5", {optO64}, {cpuAMD64});
Mnem ("MOVSS");
Instr (xmm, xmmmem32, none, "0F10/r", {optPREP}, {cpuKatmai, cpuSSE});
Instr (xmmmem32, xmm, none, "0F11/r", {optPREP}, {cpuKatmai, cpuSSE});
Mnem ("MOVSW");
Instr (none, none, none, "A5", {optO16}, {cpu8086});
Mnem ("MOVSX");
Instr (reg16, regmem8, none, "0FBE/r", {optO16}, {cpu386});
Instr (reg32, regmem8, none, "0FBE/r", {optO32}, {cpu386});
Instr (reg32, regmem16, none, "0FBF/r", {optO32}, {cpu386});
Instr (reg64, regmem8, none, "0FBE/r", {}, {cpuAMD64});
Instr (reg64, regmem16, none, "0FBF/r", {}, {cpuAMD64});
Mnem ("MOVSXD");
Instr (reg64, regmem32, none, "63/r", {}, {cpuAMD64});
Mnem ("MOVUPD");
Instr (xmm, xmmmem128, none, "0F10/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (xmmmem128, xmm, none, "0F11/r", {optPOP}, {cpuWillamette, cpuSSE2});
Mnem ("MOVUPS");
Instr (xmm, xmmmem128, none, "0F10/r", {}, {cpuKatmai, cpuSSE});
Instr (xmmmem128, xmm, none, "0F11/r", {}, {cpuKatmai, cpuSSE});
Mnem ("MOVZX");
Instr (reg16, regmem8, none, "0FB6/r", {optO16}, {cpu386});
Instr (reg32, regmem8, none, "0FB6/r", {optO32}, {cpu386});
Instr (reg32, regmem16, none, "0FB7/r", {optO32}, {cpu386});
Instr (reg64, regmem8, none, "0FB6/r", {}, {cpuAMD64});
Instr (reg64, regmem16, none, "0FB7/r", {}, {cpuAMD64});
Mnem ("MUL");
Instr (regmem8, none, none, "F6/4", {}, {cpu8086});
Instr (regmem16, none, none, "F7/4", {optO16}, {cpu8086});
Instr (regmem32, none, none, "F7/4", {optO32}, {cpu386});
Instr (regmem64, none, none, "F7/4", {}, {cpuAMD64});
Mnem ("MULPD");
Instr (xmm, xmmmem128, none, "0F59/r", {optPOP}, {cpuWillamette, cpuSSE2});
Mnem ("MULPS");
Instr (xmm, xmmmem128, none, "0F59/r", {}, {cpuKatmai, cpuSSE});
Mnem ("MULSD");
Instr (xmm, xmmmem64, none, "0F59/r", {optPREPN}, {cpuWillamette, cpuSSE2});
Mnem ("MULSS");
Instr (xmm, xmmmem32, none, "0F59/r", {optPREP}, {cpuKatmai, cpuSSE});
Mnem ("NEG");
Instr (regmem8, none, none, "F6/3", {}, {cpu8086});
Instr (regmem16, none, none, "F7/3", {optO16}, {cpu8086});
Instr (regmem32, none, none, "F7/3", {optO32}, {cpu386});
Instr (regmem64, none, none, "F7/3", {}, {cpuAMD64});
Mnem ("NOP");
Instr (none, none, none, "90", {}, {cpu8086});
Mnem ("NOT");
Instr (regmem8, none, none, "F6/2", {}, {cpu8086});
Instr (regmem16, none, none, "F7/2", {optO16}, {cpu8086});
Instr (regmem32, none, none, "F7/2", {optO32}, {cpu386});
Instr (regmem64, none, none, "F7/2", {}, {cpuAMD64});
Mnem ("OR");
Instr (AL, imm8, none, "0Cib", {}, {cpu8086});
Instr (AX, imm16, none, "0Diw", {optO16}, {cpu8086});
Instr (EAX, imm32, none, "0Did", {optO32}, {cpu386});
Instr (RAX, imm32, none, "0Did", {}, {cpuAMD64});
Instr (regmem8, reg8, none, "08/r", {}, {cpu8086});
Instr (regmem16, reg16, none, "09/r", {optO16}, {cpu8086});
Instr (regmem32, reg32, none, "09/r", {optO32}, {cpu386});
Instr (regmem64, reg64, none, "09/r", {}, {cpuAMD64});
Instr (reg8, regmem8, none, "0A/r", {}, {cpu8086});
Instr (reg16, regmem16, none, "0B/r", {optO16}, {cpu8086});
Instr (reg32, regmem32, none, "0B/r", {optO32}, {cpu386});
Instr (reg64, regmem64, none, "0B/r", {}, {cpuAMD64});
Instr (regmem8, imm8, none, "80/1ib", {}, {cpu8086});
Instr (regmem16, simm8, none, "83/1ib", {optO16}, {cpu8086});
Instr (regmem16, imm16, none, "81/1iw", {optO16}, {cpu8086});
Instr (regmem32, simm8, none, "83/1ib", {optO32}, {cpu386});
Instr (regmem32, imm32, none, "81/1id", {optO32}, {cpu386});
Instr (regmem64, simm8, none, "83/1ib", {}, {cpuAMD64});
Instr (regmem64, imm32, none, "81/1id", {}, {cpuAMD64});
Mnem ("ORPD");
Instr (xmm, xmmmem128, none, "0F56/r", {optPOP}, {cpuWillamette, cpuSSE2});
Mnem ("ORPS");
Instr (xmm, xmmmem128, none, "0F56/r", {}, {cpuKatmai, cpuSSE});
Mnem ("OUT");
Instr (DX, AL, none, "EE", {}, {cpu8086});
Instr (DX, AX, none, "EF", {optO16}, {cpu8086});
Instr (DX, EAX, none, "EF", {optO32}, {cpu386});
Instr (uimm8, AL, none, "E6ib", {}, {cpu8086});
Instr (uimm8, AX, none, "E7ib", {optO16}, {cpu8086});
Instr (uimm8, EAX, none, "E7ib", {optO32}, {cpu386});
Mnem ("OUTS");
Instr (DX, mem8, none, "6E", {}, {cpu186});
Instr (DX, mem16, none, "6F", {optO16}, {cpu186});
Instr (DX, mem32, none, "6F", {optO32}, {cpu386});
Mnem ("OUTSB");
Instr (none, none, none, "6E", {}, {cpu186});
Mnem ("OUTSD");
Instr (none, none, none, "6F", {optO32}, {cpu386});
Mnem ("OUTSW");
Instr (none, none, none, "6F", {optO16}, {cpu186});
Mnem ("PACKSSDW");
Instr (xmm, xmmmem128, none, "0F6B/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0F6B/r", {}, {cpuPentium, cpuMMX});
Mnem ("PACKSSWB");
Instr (xmm, xmmmem128, none, "0F63/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0F63/r", {}, {cpuPentium, cpuMMX});
Mnem ("PACKUSWB");
Instr (xmm, xmmmem128, none, "0F67/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0F67/r", {}, {cpuPentium, cpuMMX});
Mnem ("PADDB");
Instr (xmm, xmmmem128, none, "0FFC/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0FFC/r", {}, {cpuPentium, cpuMMX});
Mnem ("PADDD");
Instr (xmm, xmmmem128, none, "0FFE/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0FFE/r", {}, {cpuPentium, cpuMMX});
Mnem ("PADDQ");
Instr (xmm, xmmmem128, none, "0FD4/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0FD4/r", {}, {cpuPentium, cpuMMX});
Mnem ("PADDSB");
Instr (xmm, xmmmem128, none, "0FEC/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0FEC/r", {}, {cpuPentium, cpuMMX});
Mnem ("PADDSW");
Instr (xmm, xmmmem128, none, "0FED/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0FED/r", {}, {cpuPentium, cpuMMX});
Mnem ("PADDUSB");
Instr (xmm, xmmmem128, none, "0FDC/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0FDC/r", {}, {cpuPentium, cpuMMX});
Mnem ("PADDUSW");
Instr (xmm, xmmmem128, none, "0FDD/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0FDD/r", {}, {cpuPentium, cpuMMX});
Mnem ("PADDW");
Instr (xmm, xmmmem128, none, "0FFD/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0FFD/r", {}, {cpuPentium, cpuMMX});
Mnem ("PAND");
Instr (xmm, xmmmem128, none, "0FDB/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0FDB/r", {}, {cpuPentium, cpuMMX});
Mnem ("PANDN");
Instr (xmm, xmmmem128, none, "0FDF/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0FDF/r", {}, {cpuPentium, cpuMMX});
Mnem ("PAUSE");
Instr (none, none, none, "90", {optPREP}, {cpuWillamette, cpuSSE2});
Mnem ("PAVGB");
Instr (xmm, xmmmem128, none, "0FE0/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0FE0/r", {}, {cpuKatmai, cpuMMX});
Mnem ("PAVGUSB");
Instr (mmx, mmxmem64, none, "0F0F/rBF", {}, {cpuPentium, cpu3DNow});
Mnem ("PAVGW");
Instr (xmm, xmmmem128, none, "0FE3/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0FE3/r", {}, {cpuKatmai, cpuMMX});
Mnem ("PCMPEQB");
Instr (xmm, xmmmem128, none, "0F74/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0F74/r", {}, {cpuPentium, cpuMMX});
Mnem ("PCMPEQD");
Instr (xmm, xmmmem128, none, "0F76/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0F76/r", {}, {cpuPentium, cpuMMX});
Mnem ("PCMPEQW");
Instr (xmm, xmmmem128, none, "0F75/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0F75/r", {}, {cpuPentium, cpuMMX});
Mnem ("PCMPGTB");
Instr (xmm, xmmmem128, none, "0F64/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0F64/r", {}, {cpuPentium, cpuMMX});
Mnem ("PCMPGTD");
Instr (xmm, xmmmem128, none, "0F66/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0F66/r", {}, {cpuPentium, cpuMMX});
Mnem ("PCMPGTW");
Instr (xmm, xmmmem128, none, "0F65/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0F65/r", {}, {cpuPentium, cpuMMX});
Mnem ("PEXTRW");
Instr (reg32, xmm, uimm8, "0FC5/rib", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (reg32, mmx, uimm8, "0FC5/rib", {}, {cpuKatmai, cpuMMX});
Mnem ("PF2ID");
Instr (mmx, mmxmem64, none, "0F0F/r1D", {}, {cpuPentium, cpu3DNow});
Mnem ("PF2IW");
Instr (mmx, mmxmem64, none, "0F0F/r1C", {}, {cpuPentium, cpu3DNow});
Mnem ("PFACC");
Instr (mmx, mmxmem64, none, "0F0F/rAE", {}, {cpuPentium, cpu3DNow});
Mnem ("PFADD");
Instr (mmx, mmxmem64, none, "0F0F/r9E", {}, {cpuPentium, cpu3DNow});
Mnem ("PFCMPEQ");
Instr (mmx, mmxmem64, none, "0F0F/rB0", {}, {cpuPentium, cpu3DNow});
Mnem ("PFCMPGE");
Instr (mmx, mmxmem64, none, "0F0F/r90", {}, {cpuPentium, cpu3DNow});
Mnem ("PFCMPGT");
Instr (mmx, mmxmem64, none, "0F0F/rA0", {}, {cpuPentium, cpu3DNow});
Mnem ("PFMAX");
Instr (mmx, mmxmem64, none, "0F0F/rA4", {}, {cpuPentium, cpu3DNow});
Mnem ("PFMIN");
Instr (mmx, mmxmem64, none, "0F0F/r94", {}, {cpuPentium, cpu3DNow});
Mnem ("PFMUL");
Instr (mmx, mmxmem64, none, "0F0F/rB4", {}, {cpuPentium, cpu3DNow});
Mnem ("PFNACC");
Instr (mmx, mmxmem64, none, "0F0F/r8A", {}, {cpuPentium, cpu3DNow});
Mnem ("PFPNACC");
Instr (mmx, mmxmem64, none, "0F0F/r8E", {}, {cpuPentium, cpu3DNow});
Mnem ("PFRCP");
Instr (mmx, mmxmem64, none, "0F0F/r96", {}, {cpuPentium, cpu3DNow});
Mnem ("PFRCPIT1");
Instr (mmx, mmxmem64, none, "0F0F/rA6", {}, {cpuPentium, cpu3DNow});
Mnem ("PFRCPIT2");
Instr (mmx, mmxmem64, none, "0F0F/rB6", {}, {cpuPentium, cpu3DNow});
Mnem ("PFRSQIT1");
Instr (mmx, mmxmem64, none, "0F0F/rA7", {}, {cpuPentium, cpu3DNow});
Mnem ("PFRSQRT");
Instr (mmx, mmxmem64, none, "0F0F/r97", {}, {cpuPentium, cpu3DNow});
Mnem ("PFSUB");
Instr (mmx, mmxmem64, none, "0F0F/r9A", {}, {cpuPentium, cpu3DNow});
Mnem ("PFSUBR");
Instr (mmx, mmxmem64, none, "0F0F/rAA", {}, {cpuPentium, cpu3DNow});
Mnem ("PI2FD");
Instr (mmx, mmxmem64, none, "0F0F/r0D", {}, {cpuPentium, cpu3DNow});
Mnem ("PI2FW");
Instr (mmx, mmxmem64, none, "0F0F/r0C", {}, {cpuPentium, cpu3DNow});
Mnem ("PINSRW");
Instr (xmm, regmem16, uimm8, "0FC4/rib", {optO16, optD64}, {cpuWillamette, cpuSSE2});
Instr (xmm, regmem32, uimm8, "0FC4/rib", {optO32, optD64}, {cpuWillamette, cpuSSE2});
Instr (mmx, regmem16, uimm8, "0FC4/rib", {optO16, optD64}, {cpuKatmai, cpuMMX});
Instr (mmx, regmem32, uimm8, "0FC4/rib", {optO32, optD64}, {cpuKatmai, cpuMMX});
Mnem ("PMADDWD");
Instr (xmm, xmmmem128, none, "0FF5/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0FF5/r", {}, {cpuPentium, cpuMMX});
Mnem ("PMAXSW");
Instr (xmm, xmmmem128, none, "0FEE/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0FEE/r", {}, {cpuKatmai, cpuMMX});
Mnem ("PMAXUB");
Instr (xmm, xmmmem128, none, "0FDE/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0FDE/r", {}, {cpuKatmai, cpuMMX});
Mnem ("PMINSW");
Instr (xmm, xmmmem128, none, "0FEA/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0FEA/r", {}, {cpuKatmai, cpuMMX});
Mnem ("PMINUB");
Instr (xmm, xmmmem128, none, "0FDA/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0FDA/r", {}, {cpuKatmai, cpuMMX});
Mnem ("PMOVMSKB");
Instr (reg32, xmm, none, "0FD7/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (reg32, mmx, none, "0FD7/r", {}, {cpuKatmai, cpuMMX});
Mnem ("PMULHRW");
Instr (mmx, mmxmem64, none, "0F0F/rB7", {}, {cpuPentium, cpu3DNow});
Mnem ("PMULHUW");
Instr (xmm, xmmmem128, none, "0FE4/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0FE4/r", {}, {cpuKatmai, cpuMMX});
Mnem ("PMULHW");
Instr (xmm, xmmmem128, none, "0FE5/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0FE5/r", {}, {cpuPentium, cpuMMX});
Mnem ("PMULLW");
Instr (xmm, xmmmem128, none, "0FD5/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0FD5/r", {}, {cpuPentium, cpuMMX});
Mnem ("PMULUDQ");
Instr (xmm, xmmmem128, none, "0FF4/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0FF4/r", {}, {cpuWillamette, cpuSSE2});
Mnem ("POP");
Instr (ES, none, none, "07", {optI64}, {cpu8086});
Instr (SS, none, none, "17", {optI64}, {cpu8086});
Instr (DS, none, none, "1F", {optI64}, {cpu8086});
Instr (reg16, none, none, "58rw", {optO16, optD64}, {cpu8086});
Instr (reg32, none, none, "58rd", {optO32, optD64}, {cpu386});
Instr (reg64, none, none, "58rq", {optD64}, {cpuAMD64});
Instr (FS, none, none, "0FA1", {optD64}, {cpu386});
Instr (GS, none, none, "0FA9", {optD64}, {cpu386});
Instr (regmem16, none, none, "8F/0", {optO16, optD64}, {cpu8086});
Instr (regmem32, none, none, "8F/0", {optO32, optD64}, {cpu386});
Instr (regmem64, none, none, "8F/0", {optD64}, {cpuAMD64});
Mnem ("POPA");
Instr (none, none, none, "61", {optI64}, {cpu186});
Mnem ("POPAD");
Instr (none, none, none, "61", {optO32, optI64}, {cpu386});
Mnem ("POPAW");
Instr (none, none, none, "61", {optO16, optI64}, {cpu186});
Mnem ("POPF");
Instr (none, none, none, "9D", {}, {cpu8086});
Mnem ("POPFD");
Instr (none, none, none, "9D", {optO32}, {cpu386});
Mnem ("POPFQ");
Instr (none, none, none, "9D", {optO64}, {cpuAMD64});
Mnem ("POPFW");
Instr (none, none, none, "9D", {optO16}, {cpu8086});
Mnem ("POR");
Instr (xmm, xmmmem128, none, "0FEB/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0FEB/r", {}, {cpuPentium, cpuMMX});
Mnem ("PREFETCH");
Instr (mem8, none, none, "0F0D/0", {}, {cpuPentium, cpu3DNow});
Mnem ("PREFETCHNTA");
Instr (mem8, none, none, "0F18/0", {}, {cpuKatmai});
Mnem ("PREFETCHT0");
Instr (mem8, none, none, "0F18/1", {}, {cpuKatmai});
Mnem ("PREFETCHT1");
Instr (mem8, none, none, "0F18/2", {}, {cpuKatmai});
Mnem ("PREFETCHT2");
Instr (mem8, none, none, "0F18/3", {}, {cpuKatmai});
Mnem ("PREFETCHW");
Instr (mem8, none, none, "0F0D/1", {}, {cpuPentium, cpu3DNow});
Mnem ("PSADBW");
Instr (xmm, xmmmem128, none, "0FF6/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0FF6/r", {}, {cpuKatmai, cpuMMX});
Mnem ("PSHUFD");
Instr (xmm, xmmmem128, uimm8, "0F70/rib", {optPOP}, {cpuWillamette, cpuSSE2});
Mnem ("PSHUFHW");
Instr (xmm, xmmmem128, uimm8, "0F70/rib", {optPREP}, {cpuWillamette, cpuSSE2});
Mnem ("PSHUFLW");
Instr (xmm, xmmmem128, uimm8, "0F70/rib", {optPREPN}, {cpuWillamette, cpuSSE2});
Mnem ("PSHUFW");
Instr (mmx, mmxmem64, uimm8, "0F70/rib", {}, {cpuWillamette, cpuSSE2});
Mnem ("PSLLD");
Instr (xmm, xmmmem128, none, "0FF2/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0FF2/r", {}, {cpuPentium, cpuMMX});
Instr (xmm, uimm8, none, "0F72/6ib", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, uimm8, none, "0F72/6ib", {}, {cpuPentium, cpuMMX});
Mnem ("PSLLDQ");
Instr (xmm, uimm8, none, "0F73/7ib", {optPOP}, {cpuWillamette, cpuSSE2});
Mnem ("PSLLQ");
Instr (xmm, xmmmem128, none, "0FF3/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0FF3/r", {}, {cpuPentium, cpuMMX});
Instr (xmm, uimm8, none, "0F73/6ib", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, uimm8, none, "0F73/6ib", {}, {cpuPentium, cpuMMX});
Mnem ("PSLLW");
Instr (xmm, xmmmem128, none, "0FF1/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0FF1/r", {}, {cpuPentium, cpuMMX});
Instr (xmm, uimm8, none, "0F71/6ib", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, uimm8, none, "0F71/6ib", {}, {cpuPentium, cpuMMX});
Mnem ("PSRAD");
Instr (xmm, xmmmem128, none, "0FE2/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0FE2/r", {}, {cpuPentium, cpuMMX});
Instr (xmm, uimm8, none, "0F72/4ib", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, uimm8, none, "0F72/4ib", {}, {cpuPentium, cpuMMX});
Mnem ("PSRAW");
Instr (xmm, xmmmem128, none, "0FE1/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0FE1/r", {}, {cpuPentium, cpuMMX});
Instr (xmm, uimm8, none, "0F71/4ib", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, uimm8, none, "0F71/4ib", {}, {cpuPentium, cpuMMX});
Mnem ("PSRLD");
Instr (xmm, xmmmem128, none, "0FD2/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0FD2/r", {}, {cpuPentium, cpuMMX});
Instr (xmm, uimm8, none, "0F72/2ib", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, uimm8, none, "0F72/2ib", {}, {cpuPentium, cpuMMX});
Mnem ("PSRLDQ");
Instr (xmm, uimm8, none, "0F73/3ib", {optPOP}, {cpuWillamette, cpuSSE2});
Mnem ("PSRLQ");
Instr (xmm, xmmmem128, none, "0FD3/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0FD3/r", {}, {cpuPentium, cpuMMX});
Instr (xmm, uimm8, none, "0F73/2ib", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, uimm8, none, "0F73/2ib", {}, {cpuPentium, cpuMMX});
Mnem ("PSRLW");
Instr (xmm, xmmmem128, none, "0FD1/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0FD1/r", {}, {cpuPentium, cpuMMX});
Instr (xmm, uimm8, none, "0F71/2ib", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, uimm8, none, "0F71/2ib", {}, {cpuPentium, cpuMMX});
Mnem ("PSUBB");
Instr (xmm, xmmmem128, none, "0FF8/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0FF8/r", {}, {cpuPentium, cpuMMX});
Mnem ("PSUBD");
Instr (xmm, xmmmem128, none, "0FFA/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0FFA/r", {}, {cpuPentium, cpuMMX});
Mnem ("PSUBQ");
Instr (xmm, xmmmem128, none, "0FFB/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0FFB/r", {}, {cpuPentium, cpuMMX});
Mnem ("PSUBSB");
Instr (xmm, xmmmem128, none, "0FE8/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0FE8/r", {}, {cpuPentium, cpuMMX});
Mnem ("PSUBSW");
Instr (xmm, xmmmem128, none, "0FE9/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0FE9/r", {}, {cpuPentium, cpuMMX});
Mnem ("PSUBUSB");
Instr (xmm, xmmmem128, none, "0FD8/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0FD8/r", {}, {cpuPentium, cpuMMX});
Mnem ("PSUBUSW");
Instr (xmm, xmmmem128, none, "0FD9/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0FD9/r", {}, {cpuPentium, cpuMMX});
Mnem ("PSUBW");
Instr (xmm, xmmmem128, none, "0FF9/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0FF9/r", {}, {cpuPentium, cpuMMX});
Mnem ("PSWAPD");
Instr (mmx, mmxmem64, none, "0F0F/rBB", {}, {cpuPentium, cpu3DNow});
Mnem ("PUNPCKHBW");
Instr (xmm, xmmmem128, none, "0F68/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0F68/r", {}, {cpuPentium, cpuMMX});
Mnem ("PUNPCKHDQ");
Instr (xmm, xmmmem128, none, "0F6A/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0F6A/r", {}, {cpuPentium, cpuMMX});
Mnem ("PUNPCKHQDQ");
Instr (xmm, xmmmem128, none, "0F6D/r", {optPOP}, {cpuWillamette, cpuSSE2});
Mnem ("PUNPCKHWD");
Instr (xmm, xmmmem128, none, "0F69/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0F69/r", {}, {cpuPentium, cpuMMX});
Mnem ("PUNPCKLBW");
Instr (xmm, xmmmem128, none, "0F60/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem32, none, "0F60/r", {}, {cpuPentium, cpuMMX});
Mnem ("PUNPCKLDQ");
Instr (xmm, xmmmem128, none, "0F62/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem32, none, "0F62/r", {}, {cpuPentium, cpuMMX});
Mnem ("PUNPCKLQDQ");
Instr (xmm, xmmmem128, none, "0F6C/r", {optPOP}, {cpuWillamette, cpuSSE2});
Mnem ("PUNPCKLWD");
Instr (xmm, xmmmem128, none, "0F61/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem32, none, "0F61/r", {}, {cpuPentium, cpuMMX});
Mnem ("PUSH");
Instr (ES, none, none, "06", {optI64}, {cpu8086});
Instr (CS, none, none, "0E", {optI64}, {cpu8086});
Instr (SS, none, none, "16", {optI64}, {cpu8086});
Instr (DS, none, none, "1E", {optI64}, {cpu8086});
Instr (reg16, none, none, "50rw", {optO16, optD64}, {cpu8086});
Instr (reg32, none, none, "50rd", {optO32, optD64}, {cpu386});
Instr (reg64, none, none, "50rq", {optD64}, {cpuAMD64});
Instr (FS, none, none, "0FA0", {optD64}, {cpu386});
Instr (GS, none, none, "0FA8", {optD64}, {cpu386});
Instr (imm8, none, none, "6Aib", {optD64}, {cpu186});
Instr (imm16, none, none, "68iw", {optO16, optD64}, {cpu186});
Instr (imm32, none, none, "68id", {optO32, optD64}, {cpu186});
Instr (imm64, none, none, "68id", {optD64}, {cpuAMD64});
Instr (regmem16, none, none, "FF/6", {optO16, optD64}, {cpu8086});
Instr (regmem32, none, none, "FF/6", {optO32, optD64}, {cpu386});
Instr (regmem64, none, none, "FF/6", {optD64}, {cpuAMD64});
Mnem ("PUSHA");
Instr (none, none, none, "60", {optI64}, {cpu186});
Mnem ("PUSHAD");
Instr (none, none, none, "60", {optO32, optI64}, {cpu386});
Mnem ("PUSHF");
Instr (none, none, none, "9C", {}, {cpu8086});
Mnem ("PUSHFD");
Instr (none, none, none, "9C", {optO32}, {cpu386});
Mnem ("PUSHFQ");
Instr (none, none, none, "9C", {optO64}, {cpuAMD64});
Mnem ("PUSHFW");
Instr (none, none, none, "9C", {optO16}, {cpu8086});
Mnem ("PXOR");
Instr (xmm, xmmmem128, none, "0FEF/r", {optPOP}, {cpuWillamette, cpuSSE2});
Instr (mmx, mmxmem64, none, "0FEF/r", {}, {cpuPentium, cpuMMX});
Mnem ("RCL");
Instr (regmem8, one, none, "D0/2", {}, {cpu8086});
Instr (regmem8, CL, none, "D2/2", {}, {cpu8086});
Instr (regmem16, one, none, "D1/2", {optO16}, {cpu8086});
Instr (regmem16, CL, none, "D3/2", {optO16}, {cpu8086});
Instr (regmem32, one, none, "D1/2", {optO32}, {cpu386});
Instr (regmem32, CL, none, "D3/2", {optO32}, {cpu386});
Instr (regmem64, one, none, "D1/2", {}, {cpuAMD64});
Instr (regmem64, CL, none, "D3/2", {}, {cpuAMD64});
Instr (regmem8, uimm8, none, "C0/2ib", {}, {cpu186});
Instr (regmem16, uimm8, none, "C1/2ib", {optO16}, {cpu186});
Instr (regmem32, uimm8, none, "C1/2ib", {optO32}, {cpu386});
Instr (regmem64, uimm8, none, "C1/2ib", {}, {cpuAMD64});
Mnem ("RCPPS");
Instr (xmm, xmmmem128, none, "0F53/r", {}, {cpuKatmai, cpuSSE});
Mnem ("RCPSS");
Instr (xmm, xmmmem32, none, "0F53/r", {optPREP}, {cpuKatmai, cpuSSE});
Mnem ("RCR");
Instr (regmem8, one, none, "D0/3", {}, {cpu8086});
Instr (regmem8, CL, none, "D2/3", {}, {cpu8086});
Instr (regmem16, one, none, "D1/3", {optO16}, {cpu8086});
Instr (regmem16, CL, none, "D3/3", {optO16}, {cpu8086});
Instr (regmem32, one, none, "D1/3", {optO32}, {cpu386});
Instr (regmem32, CL, none, "D3/3", {optO32}, {cpu386});
Instr (regmem64, one, none, "D1/3", {}, {cpuAMD64});
Instr (regmem64, CL, none, "D3/3", {}, {cpuAMD64});
Instr (regmem8, uimm8, none, "C0/3ib", {}, {cpu186});
Instr (regmem16, uimm8, none, "C1/3ib", {optO16}, {cpu186});
Instr (regmem32, uimm8, none, "C1/3ib", {optO32}, {cpu386});
Instr (regmem64, uimm8, none, "C1/3ib", {}, {cpuAMD64});
Mnem ("RDMSR");
Instr (none, none, none, "0F32", {}, {cpuPentium, cpuPrivileged});
Mnem ("RDPMC");
Instr (none, none, none, "0F33", {}, {cpuP6});
Mnem ("RDTSC");
Instr (none, none, none, "0F31", {}, {cpuPentium});
Mnem ("RDTSCP");
Instr (none, none, none, "0F01F9", {}, {cpuPentium});
Mnem ("RET");
Instr (none, none, none, "C3", {}, {cpu8086});
Instr (uimm16, none, none, "C2iw", {}, {cpu8086});
Mnem ("RETF");
Instr (none, none, none, "CB", {}, {cpu8086});
Instr (uimm16, none, none, "CAiw", {}, {cpu8086});
Mnem ("ROL");
Instr (regmem8, one, none, "D0/0", {}, {cpu8086});
Instr (regmem8, CL, none, "D2/0", {}, {cpu8086});
Instr (regmem16, one, none, "D1/0", {optO16}, {cpu8086});
Instr (regmem16, CL, none, "D3/0", {optO16}, {cpu8086});
Instr (regmem32, one, none, "D1/0", {optO32}, {cpu386});
Instr (regmem32, CL, none, "D3/0", {optO32}, {cpu386});
Instr (regmem64, one, none, "D1/0", {}, {cpuAMD64});
Instr (regmem64, CL, none, "D3/0", {}, {cpuAMD64});
Instr (regmem8, uimm8, none, "C0/0ib", {}, {cpu186});
Instr (regmem16, uimm8, none, "C1/0ib", {optO16}, {cpu186});
Instr (regmem32, uimm8, none, "C1/0ib", {optO32}, {cpu386});
Instr (regmem64, uimm8, none, "C1/0ib", {}, {cpuAMD64});
Mnem ("ROR");
Instr (regmem8, one, none, "D0/1", {}, {cpu8086});
Instr (regmem8, CL, none, "D2/1", {}, {cpu8086});
Instr (regmem16, one, none, "D1/1", {optO16}, {cpu8086});
Instr (regmem16, CL, none, "D3/1", {optO16}, {cpu8086});
Instr (regmem32, one, none, "D1/1", {optO32}, {cpu386});
Instr (regmem32, CL, none, "D3/1", {optO32}, {cpu386});
Instr (regmem64, one, none, "D1/1", {}, {cpuAMD64});
Instr (regmem64, CL, none, "D3/1", {}, {cpuAMD64});
Instr (regmem8, uimm8, none, "C0/1ib", {}, {cpu186});
Instr (regmem16, uimm8, none, "C1/1ib", {optO16}, {cpu186});
Instr (regmem32, uimm8, none, "C1/1ib", {optO32}, {cpu386});
Instr (regmem64, uimm8, none, "C1/1ib", {}, {cpuAMD64});
Mnem ("RSM");
Instr (none, none, none, "0FAA", {}, {cpuPentium});
Mnem ("RSQRTPS");
Instr (xmm, xmmmem128, none, "0F52/r", {}, {cpuKatmai, cpuSSE});
Mnem ("RSQRTSS");
Instr (xmm, xmmmem32, none, "0F52/r", {optPREP}, {cpuKatmai, cpuSSE});
Mnem ("SAHF");
Instr (none, none, none, "9E", {}, {cpu8086});
Mnem ("SAL");
Instr (regmem8, one, none, "D0/4", {}, {cpu8086});
Instr (regmem8, CL, none, "D2/4", {}, {cpu8086});
Instr (regmem16, one, none, "D1/4", {optO16}, {cpu8086});
Instr (regmem16, CL, none, "D3/4", {optO16}, {cpu8086});
Instr (regmem32, one, none, "D1/4", {optO32}, {cpu386});
Instr (regmem32, CL, none, "D3/4", {optO32}, {cpu386});
Instr (regmem64, one, none, "D1/4", {}, {cpuAMD64});
Instr (regmem64, CL, none, "D3/4", {}, {cpuAMD64});
Instr (regmem8, uimm8, none, "C0/4ib", {}, {cpu186});
Instr (regmem16, uimm8, none, "C1/4ib", {optO16}, {cpu186});
Instr (regmem32, uimm8, none, "C1/4ib", {optO32}, {cpu386});
Instr (regmem64, uimm8, none, "C1/4ib", {}, {cpuAMD64});
Mnem ("SAR");
Instr (regmem8, one, none, "D0/7", {}, {cpu8086});
Instr (regmem8, CL, none, "D2/7", {}, {cpu8086});
Instr (regmem16, one, none, "D1/7", {optO16}, {cpu8086});
Instr (regmem16, CL, none, "D3/7", {optO16}, {cpu8086});
Instr (regmem32, one, none, "D1/7", {optO32}, {cpu386});
Instr (regmem32, CL, none, "D3/7", {optO32}, {cpu386});
Instr (regmem64, one, none, "D1/7", {}, {cpuAMD64});
Instr (regmem64, CL, none, "D3/7", {}, {cpuAMD64});
Instr (regmem8, uimm8, none, "C0/7ib", {}, {cpu186});
Instr (regmem16, uimm8, none, "C1/7ib", {optO16}, {cpu186});
Instr (regmem32, uimm8, none, "C1/7ib", {optO32}, {cpu386});
Instr (regmem64, uimm8, none, "C1/7ib", {}, {cpuAMD64});
Mnem ("SBB");
Instr (AL, imm8, none, "1Cib", {}, {cpu8086});
Instr (AX, imm16, none, "1Diw", {optO16}, {cpu8086});
Instr (EAX, imm32, none, "1Did", {optO32}, {cpu386});
Instr (RAX, imm32, none, "1Did", {}, {cpuAMD64});
Instr (regmem8, reg8, none, "18/r", {}, {cpu8086});
Instr (regmem16, reg16, none, "19/r", {optO16}, {cpu8086});
Instr (regmem32, reg32, none, "19/r", {optO32}, {cpu386});
Instr (regmem64, reg64, none, "19/r", {}, {cpuAMD64});
Instr (reg8, regmem8, none, "1A/r", {}, {cpu8086});
Instr (reg16, regmem16, none, "1B/r", {optO16}, {cpu8086});
Instr (reg32, regmem32, none, "1B/r", {optO32}, {cpu386});
Instr (reg64, regmem64, none, "1B/r", {}, {cpuAMD64});
Instr (regmem8, imm8, none, "80/3ib", {}, {cpu8086});
Instr (regmem16, simm8, none, "83/3ib", {optO16}, {cpu8086});
Instr (regmem16, imm16, none, "81/3iw", {optO16}, {cpu8086});
Instr (regmem32, simm8, none, "83/3ib", {optO32}, {cpu386});
Instr (regmem32, imm32, none, "81/3id", {optO32}, {cpu386});
Instr (regmem64, simm8, none, "83/3ib", {}, {cpuAMD64});
Instr (regmem64, imm32, none, "81/3id", {}, {cpuAMD64});
Mnem ("SCAS");
Instr (mem8, none, none, "AE", {}, {cpu8086});
Instr (mem16, none, none, "AF", {optO16}, {cpu8086});
Instr (mem32, none, none, "AF", {optO32}, {cpu386});
Instr (mem64, none, none, "AF", {}, {cpuAMD64});
Mnem ("SCASB");
Instr (none, none, none, "AE", {}, {cpu8086});
Mnem ("SCASD");
Instr (none, none, none, "AF", {optO32}, {cpu386});
Mnem ("SCASQ");
Instr (none, none, none, "AF", {optO64}, {cpuAMD64});
Mnem ("SCASW");
Instr (none, none, none, "AF", {optO16}, {cpu8086});
Mnem ("SETA");
Instr (regmem8, none, none, "0F97/0", {}, {cpu386});
Mnem ("SETAE");
Instr (regmem8, none, none, "0F93/0", {}, {cpu386});
Mnem ("SETB");
Instr (regmem8, none, none, "0F92/0", {}, {cpu386});
Mnem ("SETBE");
Instr (regmem8, none, none, "0F96/0", {}, {cpu386});
Mnem ("SETC");
Instr (regmem8, none, none, "0F92/0", {}, {cpu386});
Mnem ("SETE");
Instr (regmem8, none, none, "0F94/0", {}, {cpu386});
Mnem ("SETG");
Instr (regmem8, none, none, "0F9F/0", {}, {cpu386});
Mnem ("SETGE");
Instr (regmem8, none, none, "0F9D/0", {}, {cpu386});
Mnem ("SETL");
Instr (regmem8, none, none, "0F9C/0", {}, {cpu386});
Mnem ("SETLE");
Instr (regmem8, none, none, "0F9E/0", {}, {cpu386});
Mnem ("SETNA");
Instr (regmem8, none, none, "0F96/0", {}, {cpu386});
Mnem ("SETNAE");
Instr (regmem8, none, none, "0F92/0", {}, {cpu386});
Mnem ("SETNB");
Instr (regmem8, none, none, "0F93/0", {}, {cpu386});
Mnem ("SETNBE");
Instr (regmem8, none, none, "0F97/0", {}, {cpu386});
Mnem ("SETNC");
Instr (regmem8, none, none, "0F93/0", {}, {cpu386});
Mnem ("SETNE");
Instr (regmem8, none, none, "0F95/0", {}, {cpu386});
Mnem ("SETNG");
Instr (regmem8, none, none, "0F9E/0", {}, {cpu386});
Mnem ("SETNGE");
Instr (regmem8, none, none, "0F9C/0", {}, {cpu386});
Mnem ("SETNL");
Instr (regmem8, none, none, "0F9D/0", {}, {cpu386});
Mnem ("SETNLE");
Instr (regmem8, none, none, "0F9F/0", {}, {cpu386});
Mnem ("SETNO");
Instr (regmem8, none, none, "0F91/0", {}, {cpu386});
Mnem ("SETNP");
Instr (regmem8, none, none, "0F9B/0", {}, {cpu386});
Mnem ("SETNS");
Instr (regmem8, none, none, "0F99/0", {}, {cpu386});
Mnem ("SETNZ");
Instr (regmem8, none, none, "0F95/0", {}, {cpu386});
Mnem ("SETO");
Instr (regmem8, none, none, "0F90/0", {}, {cpu386});
Mnem ("SETP");
Instr (regmem8, none, none, "0F9A/0", {}, {cpu386});
Mnem ("SETPE");
Instr (regmem8, none, none, "0F9A/0", {}, {cpu386});
Mnem ("SETPO");
Instr (regmem8, none, none, "0F9B/0", {}, {cpu386});
Mnem ("SETS");
Instr (regmem8, none, none, "0F98/0", {}, {cpu386});
Mnem ("SETZ");
Instr (regmem8, none, none, "0F94/0", {}, {cpu386});
Mnem ("SFENCE");
Instr (none, none, none, "0FAEF8", {}, {cpuKatmai});
Mnem ("SGDT");
Instr (mem, none, none, "0F01/0", {}, {cpu286, cpuPrivileged});
Instr (mem, none, none, "0F01/0", {}, {cpuAMD64, cpuPrivileged});
Mnem ("SHL");
Instr (regmem8, one, none, "D0/4", {}, {cpu8086});
Instr (regmem8, CL, none, "D2/4", {}, {cpu8086});
Instr (regmem16, one, none, "D1/4", {optO16}, {cpu8086});
Instr (regmem16, CL, none, "D3/4", {optO16}, {cpu8086});
Instr (regmem32, one, none, "D1/4", {optO32}, {cpu386});
Instr (regmem32, CL, none, "D3/4", {optO32}, {cpu386});
Instr (regmem64, one, none, "D1/4", {}, {cpuAMD64});
Instr (regmem64, CL, none, "D3/4", {}, {cpuAMD64});
Instr (regmem8, uimm8, none, "C0/4ib", {}, {cpu186});
Instr (regmem16, uimm8, none, "C1/4ib", {optO16}, {cpu186});
Instr (regmem32, uimm8, none, "C1/4ib", {optO32}, {cpu386});
Instr (regmem64, uimm8, none, "C1/4ib", {}, {cpuAMD64});
Mnem ("SHLD");
Instr (regmem16, reg16, CL, "0FA5/r", {optO16}, {cpu386});
Instr (regmem32, reg32, CL, "0FA5/r", {optO32}, {cpu386});
Instr (regmem64, reg64, CL, "0FA5/r", {}, {cpuAMD64});
Instr (regmem16, reg16, uimm8, "0FA4/rib", {optO16}, {cpu386});
Instr (regmem32, reg32, uimm8, "0FA4/rib", {optO32}, {cpu386});
Instr (regmem64, reg64, uimm8, "0FA4/rib", {}, {cpuAMD64});
Mnem ("SHR");
Instr (regmem8, one, none, "D0/5", {}, {cpu8086});
Instr (regmem8, CL, none, "D2/5", {}, {cpu8086});
Instr (regmem16, one, none, "D1/5", {optO16}, {cpu8086});
Instr (regmem16, CL, none, "D3/5", {optO16}, {cpu8086});
Instr (regmem32, one, none, "D1/5", {optO32}, {cpu386});
Instr (regmem32, CL, none, "D3/5", {optO32}, {cpu386});
Instr (regmem64, one, none, "D1/5", {}, {cpuAMD64});
Instr (regmem64, CL, none, "D3/5", {}, {cpuAMD64});
Instr (regmem8, uimm8, none, "C0/5ib", {}, {cpu186});
Instr (regmem16, uimm8, none, "C1/5ib", {optO16}, {cpu186});
Instr (regmem32, uimm8, none, "C1/5ib", {optO32}, {cpu386});
Instr (regmem64, uimm8, none, "C1/5ib", {}, {cpuAMD64});
Mnem ("SHRD");
Instr (regmem16, reg16, CL, "0FAD/r", {optO16}, {cpu386});
Instr (regmem32, reg32, CL, "0FAD/r", {optO32}, {cpu386});
Instr (regmem64, reg64, CL, "0FAD/r", {}, {cpuAMD64});
Instr (regmem16, reg16, uimm8, "0FAC/rib", {optO16}, {cpu386});
Instr (regmem32, reg32, uimm8, "0FAC/rib", {optO32}, {cpu386});
Instr (regmem64, reg64, uimm8, "0FAC/rib", {}, {cpuAMD64});
Mnem ("SHUFPD");
Instr (xmm, xmmmem128, uimm8, "0FC6/rib", {optPOP}, {cpuWillamette, cpuSSE2});
Mnem ("SHUFPS");
Instr (xmm, xmmmem128, uimm8, "0FC6/rib", {}, {cpuKatmai, cpuSSE});
Mnem ("SIDT");
Instr (mem, none, none, "0F01/1", {}, {cpu286, cpuPrivileged});
Instr (mem, none, none, "0F01/1", {}, {cpuAMD64, cpuPrivileged});
Mnem ("SKINIT");
Instr (EAX, none, none, "0F01DE", {}, {cpuAMD64});
Mnem ("SLDT");
Instr (reg16, none, none, "0F00/0", {optO16}, {cpu286});
Instr (reg32, none, none, "0F00/0", {optO32}, {cpu386});
Instr (reg64, none, none, "0F00/0", {}, {cpuAMD64});
Instr (mem16, none, none, "0F00/0", {}, {cpu286});
Mnem ("SMSW");
Instr (reg16, none, none, "0F01/4", {optO16}, {cpu286});
Instr (reg32, none, none, "0F01/4", {optO32}, {cpu386});
Instr (reg64, none, none, "0F01/4", {}, {cpuAMD64});
Instr (mem16, none, none, "0F01/4", {}, {cpu286});
Mnem ("SQRTPD");
Instr (xmm, xmmmem128, none, "0F51/r", {optPOP}, {cpuWillamette, cpuSSE2});
Mnem ("SQRTPS");
Instr (xmm, xmmmem128, none, "0F51/r", {}, {cpuKatmai, cpuSSE});
Mnem ("SQRTSD");
Instr (xmm, xmmmem64, none, "0F51/r", {optPREPN}, {cpuWillamette, cpuSSE2});
Mnem ("SQRTSS");
Instr (xmm, xmmmem32, none, "0F51/r", {optPREP}, {cpuKatmai, cpuSSE});
Mnem ("STC");
Instr (none, none, none, "F9", {}, {cpu8086});
Mnem ("STD");
Instr (none, none, none, "FD", {}, {cpu8086});
Mnem ("STGI");
Instr (none, none, none, "0F01DC", {}, {cpuPentium});
Mnem ("STI");
Instr (none, none, none, "FB", {}, {cpu8086});
Mnem ("STMXCSR");
Instr (mem32, none, none, "0FAE/3", {}, {cpuKatmai, cpuSSE});
Mnem ("STOS");
Instr (mem8, none, none, "AA", {}, {cpu8086});
Instr (mem16, none, none, "AB", {optO16}, {cpu8086});
Instr (mem32, none, none, "AB", {optO32}, {cpu386});
Instr (mem64, none, none, "AB", {}, {cpuAMD64});
Mnem ("STOSB");
Instr (none, none, none, "AA", {}, {cpu8086});
Mnem ("STOSD");
Instr (none, none, none, "AB", {optO32}, {cpu386});
Mnem ("STOSQ");
Instr (none, none, none, "AB", {optO64}, {cpuAMD64});
Mnem ("STOSW");
Instr (none, none, none, "AB", {optO16}, {cpu8086});
Mnem ("STR");
Instr (reg16, none, none, "0F00/1", {optO16}, {cpu286, cpuProtected});
Instr (reg32, none, none, "0F00/1", {optO32}, {cpu386, cpuProtected});
Instr (reg64, none, none, "0F00/1", {}, {cpuAMD64});
Instr (mem16, none, none, "0F00/1", {}, {cpu286, cpuProtected});
Mnem ("SUB");
Instr (AL, imm8, none, "2Cib", {}, {cpu8086});
Instr (AX, imm16, none, "2Diw", {optO16}, {cpu8086});
Instr (EAX, imm32, none, "2Did", {optO32}, {cpu386});
Instr (RAX, imm32, none, "2Did", {}, {cpuAMD64});
Instr (regmem8, reg8, none, "28/r", {}, {cpu8086});
Instr (regmem16, reg16, none, "29/r", {optO16}, {cpu8086});
Instr (regmem32, reg32, none, "29/r", {optO32}, {cpu386});
Instr (regmem64, reg64, none, "29/r", {}, {cpuAMD64});
Instr (reg8, regmem8, none, "2A/r", {}, {cpu8086});
Instr (reg16, regmem16, none, "2B/r", {optO16}, {cpu8086});
Instr (reg32, regmem32, none, "2B/r", {optO32}, {cpu386});
Instr (reg64, regmem64, none, "2B/r", {}, {cpuAMD64});
Instr (regmem8, imm8, none, "80/5ib", {}, {cpu8086});
Instr (regmem16, simm8, none, "83/5ib", {optO16}, {cpu8086});
Instr (regmem16, imm16, none, "81/5iw", {optO16}, {cpu8086});
Instr (regmem32, simm8, none, "83/5ib", {optO32}, {cpu386});
Instr (regmem32, imm32, none, "81/5id", {optO32}, {cpu386});
Instr (regmem64, simm8, none, "83/5ib", {}, {cpuAMD64});
Instr (regmem64, imm32, none, "81/5id", {}, {cpuAMD64});
Mnem ("SUBPD");
Instr (xmm, xmmmem128, none, "0F5C/r", {optPOP}, {cpuWillamette, cpuSSE2});
Mnem ("SUBPS");
Instr (xmm, xmmmem128, none, "0F5C/r", {}, {cpuKatmai, cpuSSE});
Mnem ("SUBSD");
Instr (xmm, xmmmem64, none, "0F5C/r", {optPREPN}, {cpuWillamette, cpuSSE2});
Mnem ("SUBSS");
Instr (xmm, xmmmem32, none, "0F5C/r", {optPREP}, {cpuKatmai, cpuSSE});
Mnem ("SWAPGS");
Instr (none, none, none, "0F01F8", {}, {cpuAMD64});
Mnem ("SYSCALL");
Instr (none, none, none, "0F05", {}, {cpuP6});
Mnem ("SYSENTER");
Instr (none, none, none, "0F34", {optI64}, {cpuP6});
Mnem ("SYSEXIT");
Instr (none, none, none, "0F35", {optI64}, {cpuP6, cpuPrivileged});
Mnem ("SYSRET");
Instr (none, none, none, "0F07", {}, {cpuP6, cpuPrivileged});
Mnem ("TEST");
Instr (AL, imm8, none, "A8ib", {}, {cpu8086});
Instr (AX, imm16, none, "A9iw", {optO16}, {cpu8086});
Instr (EAX, imm32, none, "A9id", {optO32}, {cpu386});
Instr (RAX, imm32, none, "A9id", {}, {cpuAMD64});
Instr (regmem8, reg8, none, "84/r", {}, {cpu8086});
Instr (regmem16, reg16, none, "85/r", {optO16}, {cpu8086});
Instr (regmem32, reg32, none, "85/r", {optO32}, {cpu386});
Instr (regmem64, reg64, none, "85/r", {}, {cpuAMD64});
Instr (reg8, regmem8, none, "84/r", {}, {cpu8086});
Instr (reg16, regmem16, none, "85/r", {optO16}, {cpu8086});
Instr (reg32, regmem32, none, "85/r", {optO32}, {cpu386});
Instr (reg64, regmem64, none, "85/r", {}, {cpuAMD64});
Instr (regmem8, imm8, none, "F6/0ib", {}, {cpu8086});
Instr (regmem16, imm16, none, "F7/0iw", {optO16}, {cpu8086});
Instr (regmem32, imm32, none, "F7/0id", {optO32}, {cpu386});
Instr (regmem64, imm32, none, "F7/0id", {}, {cpuAMD64});
Mnem ("UCOMISD");
Instr (xmm, xmmmem64, none, "0F2E/r", {optPOP}, {cpuWillamette, cpuSSE2});
Mnem ("UCOMISS");
Instr (xmm, xmmmem32, none, "0F2E/r", {}, {cpuKatmai, cpuSSE});
Mnem ("UD2");
Instr (none, none, none, "0F0B", {}, {cpu286});
Mnem ("UNPCKHPD");
Instr (xmm, xmmmem128, none, "0F15/r", {optPOP}, {cpuWillamette, cpuSSE2});
Mnem ("UNPCKHPS");
Instr (xmm, xmmmem128, none, "0F15/r", {}, {cpuKatmai, cpuSSE});
Mnem ("UNPCKLPD");
Instr (xmm, xmmmem128, none, "0F14/r", {optPOP}, {cpuWillamette, cpuSSE2});
Mnem ("UNPCKLPS");
Instr (xmm, xmmmem128, none, "0F14/r", {}, {cpuKatmai, cpuSSE});
Mnem ("VERR");
Instr (regmem16, none, none, "0F00/4", {}, {cpu286, cpuPrivileged});
Mnem ("VERW");
Instr (regmem16, none, none, "0F00/5", {}, {cpu286, cpuPrivileged});
Mnem ("VMLOAD");
Instr (rAX, none, none, "0F01DA", {}, {cpuAMD64});
Mnem ("VMMCALL");
Instr (none, none, none, "0F01D9", {}, {cpuAMD64});
Mnem ("VMRUN");
Instr (rAX, none, none, "0F01D8", {}, {cpuAMD64});
Mnem ("VMSAVE");
Instr (rAX, none, none, "0F01DB", {}, {cpuAMD64});
Mnem ("WBINVD");
Instr (none, none, none, "0F09", {}, {cpu486, cpuPrivileged});
Mnem ("WRMSR");
Instr (none, none, none, "0F30", {}, {cpuPentium, cpuPrivileged});
Mnem ("XADD");
Instr (regmem8, reg8, none, "0FC0/r", {}, {cpu486});
Instr (regmem16, reg16, none, "0FC1/r", {optO16}, {cpu486});
Instr (regmem32, reg32, none, "0FC1/r", {optO32}, {cpu486});
Instr (regmem64, reg64, none, "0FC1/r", {}, {cpuAMD64});
Mnem ("XCHG");
Instr (AX, reg16, none, "90rw", {optO16}, {cpu8086});
Instr (EAX, reg32, none, "90rd", {optO32}, {cpu386});
Instr (RAX, reg64, none, "90rq", {}, {cpuAMD64});
Instr (reg16, AX, none, "90rw", {optO16}, {cpu8086});
Instr (reg32, EAX, none, "90rd", {optO32}, {cpu386});
Instr (reg64, RAX, none, "90rq", {}, {cpuAMD64});
Instr (reg8, regmem8, none, "86/r", {}, {cpu8086});
Instr (reg16, regmem16, none, "87/r", {optO16}, {cpu8086});
Instr (reg32, regmem32, none, "87/r", {optO32}, {cpu386});
Instr (reg64, regmem64, none, "87/r", {}, {cpuAMD64});
Instr (regmem8, reg8, none, "86/r", {}, {cpu8086});
Instr (regmem16, reg16, none, "87/r", {optO16}, {cpu8086});
Instr (regmem32, reg32, none, "87/r", {optO32}, {cpu386});
Instr (regmem64, reg64, none, "87/r", {}, {cpuAMD64});
Mnem ("XLAT");
Instr (mem8, none, none, "D7", {}, {cpu8086});
Mnem ("XLATB");
Instr (none, none, none, "D7", {}, {cpu8086});
Mnem ("XOR");
Instr (AL, imm8, none, "34ib", {}, {cpu8086});
Instr (AX, imm16, none, "35iw", {optO16}, {cpu8086});
Instr (EAX, imm32, none, "35id", {optO32}, {cpu386});
Instr (RAX, imm32, none, "35id", {}, {cpuAMD64});
Instr (regmem8, reg8, none, "30/r", {}, {cpu8086});
Instr (regmem16, reg16, none, "31/r", {optO16}, {cpu8086});
Instr (regmem32, reg32, none, "31/r", {optO32}, {cpu386});
Instr (regmem64, reg64, none, "31/r", {}, {cpuAMD64});
Instr (reg8, regmem8, none, "32/r", {}, {cpu8086});
Instr (reg16, regmem16, none, "33/r", {optO16}, {cpu8086});
Instr (reg32, regmem32, none, "33/r", {optO32}, {cpu386});
Instr (reg64, regmem64, none, "33/r", {}, {cpuAMD64});
Instr (regmem8, imm8, none, "80/6ib", {}, {cpu8086});
Instr (regmem16, simm8, none, "83/6ib", {optO16}, {cpu8086});
Instr (regmem16, imm16, none, "81/6iw", {optO16}, {cpu8086});
Instr (regmem32, simm8, none, "83/6ib", {optO32}, {cpu386});
Instr (regmem32, imm32, none, "81/6id", {optO32}, {cpu386});
Instr (regmem64, simm8, none, "83/6ib", {}, {cpuAMD64});
Instr (regmem64, imm32, none, "81/6id", {}, {cpuAMD64});
Mnem ("XORPD");
Instr (xmm, xmmmem128, none, "0F57/r", {optPOP}, {cpuWillamette, cpuSSE2});
Mnem ("XORPS");
Instr (xmm, xmmmem128, none, "0F57/r", {}, {cpuKatmai, cpuSSE});
Reg ("AL", reg8, 0);
Reg ("CL", reg8, 1);
Reg ("DL", reg8, 2);
Reg ("BL", reg8, 3);
Reg ("SPL", reg8, 4);
Reg ("BPL", reg8, 5);
Reg ("SIL", reg8, 6);
Reg ("DIL", reg8, 7);
Reg ("AH", reg8, 4);
Reg ("CH", reg8, 5);
Reg ("DH", reg8, 6);
Reg ("BH", reg8, 7);
Reg ("R8B", reg8, 8);
Reg ("R9B", reg8, 9);
Reg ("R10B", reg8, 10);
Reg ("R11B", reg8, 11);
Reg ("R12B", reg8, 12);
Reg ("R13B", reg8, 13);
Reg ("R14B", reg8, 14);
Reg ("R15B", reg8, 15);
Reg ("AX", reg16, 0);
Reg ("CX", reg16, 1);
Reg ("DX", reg16, 2);
Reg ("BX", reg16, 3);
Reg ("SP", reg16, 4);
Reg ("BP", reg16, 5);
Reg ("SI", reg16, 6);
Reg ("DI", reg16, 7);
Reg ("R8W", reg16, 8);
Reg ("R9W", reg16, 9);
Reg ("R10W", reg16, 10);
Reg ("R11W", reg16, 11);
Reg ("R12W", reg16, 12);
Reg ("R13W", reg16, 13);
Reg ("R14W", reg16, 14);
Reg ("R15W", reg16, 15);
Reg ("EAX", reg32, 0);
Reg ("ECX", reg32, 1);
Reg ("EDX", reg32, 2);
Reg ("EBX", reg32, 3);
Reg ("ESP", reg32, 4);
Reg ("EBP", reg32, 5);
Reg ("ESI", reg32, 6);
Reg ("EDI", reg32, 7);
Reg ("R8D", reg32, 8);
Reg ("R9D", reg32, 9);
Reg ("R10D", reg32, 10);
Reg ("R11D", reg32, 11);
Reg ("R12D", reg32, 12);
Reg ("R13D", reg32, 13);
Reg ("R14D", reg32, 14);
Reg ("R15D", reg32, 15);
Reg ("RAX", reg64, 0);
Reg ("RCX", reg64, 1);
Reg ("RDX", reg64, 2);
Reg ("RBX", reg64, 3);
Reg ("RSP", reg64, 4);
Reg ("RBP", reg64, 5);
Reg ("RSI", reg64, 6);
Reg ("RDI", reg64, 7);
Reg ("R8", reg64, 8);
Reg ("R9", reg64, 9);
Reg ("R10", reg64, 10);
Reg ("R11", reg64, 11);
Reg ("R12", reg64, 12);
Reg ("R13", reg64, 13);
Reg ("R14", reg64, 14);
Reg ("R15", reg64, 15);
Reg ("RIP", reg64, 16);
Reg ("ES", segReg, 0);
Reg ("CS", segReg, 1);
Reg ("SS", segReg, 2);
Reg ("DS", segReg, 3);
Reg ("FS", segReg, 4);
Reg ("GS", segReg, 5);
Reg ("CR0", CRn, 0);
Reg ("CR1", CRn, 1);
Reg ("CR2", CRn, 2);
Reg ("CR3", CRn, 3);
Reg ("CR4", CRn, 4);
Reg ("CR5", CRn, 5);
Reg ("CR6", CRn, 6);
Reg ("CR7", CRn, 7);
Reg ("CR8", CRn, 8);
Reg ("CR9", CRn, 9);
Reg ("CR10", CRn, 10);
Reg ("CR11", CRn, 11);
Reg ("CR12", CRn, 12);
Reg ("CR13", CRn, 13);
Reg ("CR14", CRn, 14);
Reg ("CR15", CRn, 15);
Reg ("DR0", DRn, 0);
Reg ("DR1", DRn, 1);
Reg ("DR2", DRn, 2);
Reg ("DR3", DRn, 3);
Reg ("DR4", DRn, 4);
Reg ("DR5", DRn, 5);
Reg ("DR6", DRn, 6);
Reg ("DR7", DRn, 7);
Reg ("DR8", DRn, 8);
Reg ("DR9", DRn, 9);
Reg ("DR10", DRn, 10);
Reg ("DR11", DRn, 11);
Reg ("DR12", DRn, 12);
Reg ("DR13", DRn, 13);
Reg ("DR14", DRn, 14);
Reg ("DR15", DRn, 15);
Reg ("ST0", sti, 0);
Reg ("ST1", sti, 1);
Reg ("ST2", sti, 2);
Reg ("ST3", sti, 3);
Reg ("ST4", sti, 4);
Reg ("ST5", sti, 5);
Reg ("ST6", sti, 6);
Reg ("ST7", sti, 7);
Reg ("XMM0", xmm, 0);
Reg ("XMM1", xmm, 1);
Reg ("XMM2", xmm, 2);
Reg ("XMM3", xmm, 3);
Reg ("XMM4", xmm, 4);
Reg ("XMM5", xmm, 5);
Reg ("XMM6", xmm, 6);
Reg ("XMM7", xmm, 7);
Reg ("XMM8", xmm, 8);
Reg ("XMM9", xmm, 9);
Reg ("XMM10", xmm, 10);
Reg ("XMM11", xmm, 11);
Reg ("XMM12", xmm, 12);
Reg ("XMM13", xmm, 13);
Reg ("XMM14", xmm, 14);
Reg ("XMM15", xmm, 15);
Reg ("MMX0", mmx, 0);
Reg ("MMX1", mmx, 1);
Reg ("MMX2", mmx, 2);
Reg ("MMX3", mmx, 3);
Reg ("MMX4", mmx, 4);
Reg ("MMX5", mmx, 5);
Reg ("MMX6", mmx, 6);
Reg ("MMX7", mmx, 7);
Cpu ("8086", {cpu8086});
Cpu ("186", {cpu8086, cpu186});
Cpu ("286", {cpu8086 .. cpu286});
Cpu ("386", {cpu8086 .. cpu386});
Cpu ("486", {cpu8086 .. cpu486});
Cpu ("586", {cpu8086 .. cpuPentium});
Cpu ("PENTIUM", {cpu8086 .. cpuPentium});
Cpu ("686", {cpu8086 .. cpuP6});
Cpu ("PPRO", {cpu8086 .. cpuP6});
Cpu ("PENTIUMPRO", {cpu8086 .. cpuP6});
Cpu ("P2", {cpu8086 .. cpuP6});
Cpu ("P3", {cpu8086 .. cpuKatmai});
Cpu ("KATMAI", {cpu8086 .. cpuKatmai});
Cpu ("P4", {cpu8086 .. cpuWillamette});
Cpu ("WILLAMETTE", {cpu8086 .. cpuWillamette});
Cpu ("PRESCOTT", {cpu8086 .. cpuPrescott});
Cpu ("AMD64", {cpu8086 .. cpuAMD64, cpuSSE, cpuSSE2, cpuSSE3, cpu3DNow, cpuMMX});
Cpu ("PRIVILEGED", {cpuPrivileged});
Cpu ("PROTECTED", {cpuProtected});
Cpu ("SSE", {cpuSSE});
Cpu ("SSE2", {cpuSSE2});
Cpu ("SSE3", {cpuSSE3});
Cpu ("3DNOW", {cpu3DNow});
Cpu ("MMX", {cpuMMX});
Cpu ("FPU", {cpuFPU});
END ASMAMD64.